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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-23 12:02:46 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-23 12:02:46 +0000 |
commit | da521cc1cc733ee1c27b00e4c0e365c8b702e2e0 (patch) | |
tree | 915376214ba144986936e599af7f9b6005df7974 /lib/Target/Mips/MipsISelLowering.h | |
parent | 669b9668619eb167639bb6f3b0841eda7da78d6c (diff) | |
download | llvm-da521cc1cc733ee1c27b00e4c0e365c8b702e2e0.tar.gz llvm-da521cc1cc733ee1c27b00e4c0e365c8b702e2e0.tar.bz2 llvm-da521cc1cc733ee1c27b00e4c0e365c8b702e2e0.tar.xz |
[mips][msa] Implemented build_vector using ldi, fill, and custom SelectionDAG nodes (VSPLAT and VSPLATD)
Note: There's a later patch on my branch that re-implements this to select
build_vector without the custom SelectionDAG nodes. The future patch avoids
the constant-folding problems stemming from the custom node (i.e. it doesn't
need to re-implement all the DAG combines related to BUILD_VECTOR).
Changes to MIPS specific SelectionDAG nodes:
* Added VSPLAT
This is a special case of BUILD_VECTOR that covers the case the
BUILD_VECTOR is a splat operation.
* Added VSPLATD
This is a special case of VSPLAT that handles the cases when v2i64 is legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191191 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.h')
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h index 85aa162fb4..57b5603ac2 100644 --- a/lib/Target/Mips/MipsISelLowering.h +++ b/lib/Target/Mips/MipsISelLowering.h @@ -152,12 +152,18 @@ namespace llvm { SETCC_DSP, SELECT_CC_DSP, - // Vector comparisons + // Vector comparisons. VALL_ZERO, VANY_ZERO, VALL_NONZERO, VANY_NONZERO, + // Special case of BUILD_VECTOR where all elements are the same. + VSPLAT, + // Special case of VSPLAT where the result is v2i64, the operand is + // constant, and the operand fits in a signed 10-bits value. + VSPLATD, + // Load/Store Left/Right nodes. LWL = ISD::FIRST_TARGET_MEMORY_OPCODE, LWR, |