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| author | Akira Hatanaka <ahatanak@gmail.com> | 2011-04-15 21:00:26 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-04-15 21:00:26 +0000 |
| commit | 0bf3dfbef60e36827df9c7e12b62503f1e345cd0 (patch) | |
| tree | 2d216dbfb7ecf59bc8c895297ca198d605f6f844 /lib/Target/Mips/MipsInstrInfo.h | |
| parent | b485de5d8c3fe0c62c0b07f63f64bd10f6803c17 (diff) | |
| download | llvm-0bf3dfbef60e36827df9c7e12b62503f1e345cd0.tar.gz llvm-0bf3dfbef60e36827df9c7e12b62503f1e345cd0.tar.bz2 llvm-0bf3dfbef60e36827df9c7e12b62503f1e345cd0.tar.xz | |
Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129606 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrInfo.h')
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h index 5fdbf1f230..d5ec2beefc 100644 --- a/lib/Target/Mips/MipsInstrInfo.h +++ b/lib/Target/Mips/MipsInstrInfo.h @@ -1,15 +1,15 @@ -//===- MipsInstrInfo.h - Mips Instruction Information -----------*- C++ -*-===// +//===- MipsInstrInfo.h - Mips Instruction Information ----------*- C++ -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // -//===----------------------------------------------------------------------===// +//===---------------------------------------------------------------------===// // // This file contains the Mips implementation of the TargetInstrInfo class. // -//===----------------------------------------------------------------------===// +//===---------------------------------------------------------------------===// #ifndef MIPSINSTRUCTIONINFO_H #define MIPSINSTRUCTIONINFO_H @@ -124,7 +124,7 @@ namespace Mips { namespace MipsII { /// Target Operand Flag enum. enum TOF { - //===------------------------------------------------------------------===// + //===-----------------------------------------------------------------===// // Mips Specific MachineOperand flags. MO_NO_FLAG, @@ -200,7 +200,8 @@ public: bool KillSrc) const; virtual void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned SrcReg, bool isKill, int FrameIndex, + unsigned SrcReg, bool isKill, + int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const; |