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| author | Jack Carter <jcarter@mips.com> | 2013-01-19 02:00:40 +0000 |
|---|---|---|
| committer | Jack Carter <jcarter@mips.com> | 2013-01-19 02:00:40 +0000 |
| commit | e11dda8631f1e65417971ee0c2f7a661fc7d0fd7 (patch) | |
| tree | 8639124533290ba66f23d2edc4b0e9e298325a84 /lib/Target/Mips/MipsInstrInfo.td | |
| parent | 065db2347f4df7a92f18221bd7288ebcd4c38c35 (diff) | |
| download | llvm-e11dda8631f1e65417971ee0c2f7a661fc7d0fd7.tar.gz llvm-e11dda8631f1e65417971ee0c2f7a661fc7d0fd7.tar.bz2 llvm-e11dda8631f1e65417971ee0c2f7a661fc7d0fd7.tar.xz | |
This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
Formatting fixes. Mostly long lines and
blank spaces at end of lines.
Contributer: Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172882 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 9085a26d23..74f31780ef 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -951,10 +951,14 @@ def : InstAlias<"slt $rs, $rt, $imm", def : InstAlias<"xor $rs, $rt, $imm", (XORi CPURegsOpnd:$rs, CPURegsOpnd:$rt, simm16:$imm)>, Requires<[NotMips64]>; -def : InstAlias<"mfc0 $rt, $rd", (MFC0_3OP CPURegsOpnd:$rt, CPURegsOpnd:$rd, 0)>; -def : InstAlias<"mtc0 $rt, $rd", (MTC0_3OP CPURegsOpnd:$rd, 0, CPURegsOpnd:$rt)>; -def : InstAlias<"mfc2 $rt, $rd", (MFC2_3OP CPURegsOpnd:$rt, CPURegsOpnd:$rd, 0)>; -def : InstAlias<"mtc2 $rt, $rd", (MTC2_3OP CPURegsOpnd:$rd, 0, CPURegsOpnd:$rt)>; +def : InstAlias<"mfc0 $rt, $rd", (MFC0_3OP CPURegsOpnd:$rt, + CPURegsOpnd:$rd, 0)>; +def : InstAlias<"mtc0 $rt, $rd", (MTC0_3OP CPURegsOpnd:$rd, 0, + CPURegsOpnd:$rt)>; +def : InstAlias<"mfc2 $rt, $rd", (MFC2_3OP CPURegsOpnd:$rt, + CPURegsOpnd:$rd, 0)>; +def : InstAlias<"mtc2 $rt, $rd", (MTC2_3OP CPURegsOpnd:$rd, 0, + CPURegsOpnd:$rt)>; //===----------------------------------------------------------------------===// // Assembler Pseudo Instructions |