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authorVladimir Medic <Vladimir.Medic@imgtec.com>2013-08-16 10:17:03 +0000
committerVladimir Medic <Vladimir.Medic@imgtec.com>2013-08-16 10:17:03 +0000
commit6f297afb7ea6ab53be1feae4a335e7b1cb7a1f02 (patch)
treefb8ee207465be7757526595aa21db8792ad2a2ae /lib/Target/Mips/MipsInstrInfo.td
parent0163356ad1944dda162956993a95e547dc03251b (diff)
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This patch implements wait instruction for mips. Examples are added in test files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188537 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrInfo.td')
-rw-r--r--lib/Target/Mips/MipsInstrInfo.td11
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td
index 1753207420..3d7ba007ff 100644
--- a/lib/Target/Mips/MipsInstrInfo.td
+++ b/lib/Target/Mips/MipsInstrInfo.td
@@ -673,6 +673,15 @@ class DEI_FT<string opstr, RegisterOperand RO> :
InstSE<(outs RO:$rt), (ins),
!strconcat(opstr, "\t$rt"), [], NoItinerary, FrmOther>;
+// Wait
+class WAIT_FT<string opstr> :
+ InstSE<(outs), (ins), opstr, [], NoItinerary, FrmOther> {
+ let Inst{31-26} = 0x10;
+ let Inst{25} = 1;
+ let Inst{24-6} = 0;
+ let Inst{5-0} = 0x20;
+}
+
// Sync
let hasSideEffects = 1 in
class SYNC_FT :
@@ -990,6 +999,8 @@ def DERET : ER_FT<"deret">, ER_FM<0x1f>;
def EI : DEI_FT<"ei", GPR32Opnd>, EI_FM<1>;
def DI : DEI_FT<"di", GPR32Opnd>, EI_FM<0>;
+def WAIT : WAIT_FT<"wait">;
+
/// Load-linked, Store-conditional
let Predicates = [NotN64, HasStdEnc] in {
def LL : LLBase<"ll", GPR32Opnd, mem>, LW_FM<0x30>;