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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2013-09-14 07:35:41 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2013-09-14 07:35:41 +0000 |
| commit | dcc425c6301c088b4c0598696de50c01fbca5733 (patch) | |
| tree | 049ea5c99e7573d0bd464fc3a2bb032c65f5c90a /lib/Target/Mips/MipsInstrInfo.td | |
| parent | ab48d10effb223de0c9516ccae616a80fef27df8 (diff) | |
| download | llvm-dcc425c6301c088b4c0598696de50c01fbca5733.tar.gz llvm-dcc425c6301c088b4c0598696de50c01fbca5733.tar.bz2 llvm-dcc425c6301c088b4c0598696de50c01fbca5733.tar.xz | |
Fixed bug when generating Load Upper Immediate microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190746 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 1c6b3cd906..4795969175 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -447,7 +447,7 @@ class shift_rotate_reg<string opstr, RegisterOperand RO, // Load Upper Imediate class LoadUpper<string opstr, RegisterOperand RO, Operand Imm>: InstSE<(outs RO:$rt), (ins Imm:$imm16), !strconcat(opstr, "\t$rt, $imm16"), - [], IIArith, FrmI>, IsAsCheapAsAMove { + [], IIArith, FrmI, opstr>, IsAsCheapAsAMove { let neverHasSideEffects = 1; let isReMaterializable = 1; } |