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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-05-24 18:32:33 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-05-24 18:32:33 +0000 |
| commit | 4a5a8949cd15bab98c6d73754b4d6376b34ee8af (patch) | |
| tree | 52c9027062195a4a7c8367f90d2162422df38df6 /lib/Target/Mips/MipsRegisterInfo.td | |
| parent | 8d2a004822f9cc5bf38d5ef14494e2f0faa82b8c (diff) | |
| download | llvm-4a5a8949cd15bab98c6d73754b4d6376b34ee8af.tar.gz llvm-4a5a8949cd15bab98c6d73754b4d6376b34ee8af.tar.bz2 llvm-4a5a8949cd15bab98c6d73754b4d6376b34ee8af.tar.xz | |
Enable Mips16 compiler to compile a null program.
First code from the Mips16 compiler. Includes trivial test program.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157408 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsRegisterInfo.td')
| -rw-r--r-- | lib/Target/Mips/MipsRegisterInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsRegisterInfo.td b/lib/Target/Mips/MipsRegisterInfo.td index 8a13bd13ea..fb2f9c010e 100644 --- a/lib/Target/Mips/MipsRegisterInfo.td +++ b/lib/Target/Mips/MipsRegisterInfo.td @@ -271,6 +271,8 @@ def CPU16Regs : RegisterClass<"Mips", [i32], 32, (add // Callee save S0, S1)>; +def CPURAReg : RegisterClass<"Mips", [i32], 32, (add RA)>; + // 64bit fp: // * FGR64 - 32 64-bit registers |