summaryrefslogtreecommitdiff
path: root/lib/Target/Mips/MipsRegisterInfo.td
diff options
context:
space:
mode:
authorAkira Hatanaka <ahatanaka@mips.com>2011-12-07 23:23:52 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2011-12-07 23:23:52 +0000
commitbe7b67368c3f7dec5a4b9cf512e4a2ceacb907cb (patch)
treef68a4d3bd184418a3d6a1c44380e23be154440c7 /lib/Target/Mips/MipsRegisterInfo.td
parentda86fa14f0d1e8bfaede9d98fd66b64dcc3c9bc2 (diff)
downloadllvm-be7b67368c3f7dec5a4b9cf512e4a2ceacb907cb.tar.gz
llvm-be7b67368c3f7dec5a4b9cf512e4a2ceacb907cb.tar.bz2
llvm-be7b67368c3f7dec5a4b9cf512e4a2ceacb907cb.tar.xz
Add 64-bit HWR29 register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146099 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsRegisterInfo.td')
-rw-r--r--lib/Target/Mips/MipsRegisterInfo.td2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsRegisterInfo.td b/lib/Target/Mips/MipsRegisterInfo.td
index 925ad9e70a..c8cf7f2144 100644
--- a/lib/Target/Mips/MipsRegisterInfo.td
+++ b/lib/Target/Mips/MipsRegisterInfo.td
@@ -239,6 +239,7 @@ let Namespace = "Mips" in {
// Hardware register $29
def HWR29 : Register<"29">;
+ def HWR29_64 : Register<"29">;
}
//===----------------------------------------------------------------------===//
@@ -301,3 +302,4 @@ def HILO64 : RegisterClass<"Mips", [i64], 64, (add HI64, LO64)> {
// Hardware registers
def HWRegs : RegisterClass<"Mips", [i32], 32, (add HWR29)>;
+def HWRegs64 : RegisterClass<"Mips", [i64], 32, (add HWR29_64)>; \ No newline at end of file