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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-10-30 13:07:44 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-10-30 13:07:44 +0000 |
| commit | 57cd3bc4064bd71eb6572d3cba5e23471ab25863 (patch) | |
| tree | dff26cdc3cc6aee097c810c506158119d1880cfd /lib/Target/Mips/MipsSEISelLowering.cpp | |
| parent | 9a5df73e32819c45884feee6bd49e7ebe911f977 (diff) | |
| download | llvm-57cd3bc4064bd71eb6572d3cba5e23471ab25863.tar.gz llvm-57cd3bc4064bd71eb6572d3cba5e23471ab25863.tar.bz2 llvm-57cd3bc4064bd71eb6572d3cba5e23471ab25863.tar.xz | |
[mips][msa] Added support for matching splat.[bhw] from normal IR (i.e. not intrinsics)
splat.d is implemented but this subtest is currently disabled. This is because
it is difficult to match the appropriate IR on MIPS32. There is a patch under
review that should help with this so I hope to enable the subtest soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193680 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSEISelLowering.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsSEISelLowering.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsSEISelLowering.cpp b/lib/Target/Mips/MipsSEISelLowering.cpp index 6c89424eb6..c1f9a1ff5e 100644 --- a/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/lib/Target/Mips/MipsSEISelLowering.cpp @@ -1561,6 +1561,17 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_slli_d: return DAG.getNode(ISD::SHL, DL, Op->getValueType(0), Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG)); + case Intrinsic::mips_splat_b: + case Intrinsic::mips_splat_h: + case Intrinsic::mips_splat_w: + case Intrinsic::mips_splat_d: + // We can't lower via VECTOR_SHUFFLE because it requires constant shuffle + // masks, nor can we lower via BUILD_VECTOR & EXTRACT_VECTOR_ELT because + // EXTRACT_VECTOR_ELT can't extract i64's on MIPS32. + // Instead we lower to MipsISD::VSHF and match from there. + return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), + lowerMSASplatImm(Op, 2, DAG), Op->getOperand(1), + Op->getOperand(1)); case Intrinsic::mips_splati_b: case Intrinsic::mips_splati_h: case Intrinsic::mips_splati_w: |