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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-23 12:02:46 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-23 12:02:46 +0000 |
commit | da521cc1cc733ee1c27b00e4c0e365c8b702e2e0 (patch) | |
tree | 915376214ba144986936e599af7f9b6005df7974 /lib/Target/Mips/MipsSEISelLowering.h | |
parent | 669b9668619eb167639bb6f3b0841eda7da78d6c (diff) | |
download | llvm-da521cc1cc733ee1c27b00e4c0e365c8b702e2e0.tar.gz llvm-da521cc1cc733ee1c27b00e4c0e365c8b702e2e0.tar.bz2 llvm-da521cc1cc733ee1c27b00e4c0e365c8b702e2e0.tar.xz |
[mips][msa] Implemented build_vector using ldi, fill, and custom SelectionDAG nodes (VSPLAT and VSPLATD)
Note: There's a later patch on my branch that re-implements this to select
build_vector without the custom SelectionDAG nodes. The future patch avoids
the constant-folding problems stemming from the custom node (i.e. it doesn't
need to re-implement all the DAG combines related to BUILD_VECTOR).
Changes to MIPS specific SelectionDAG nodes:
* Added VSPLAT
This is a special case of BUILD_VECTOR that covers the case the
BUILD_VECTOR is a splat operation.
* Added VSPLATD
This is a special case of VSPLAT that handles the cases when v2i64 is legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191191 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsSEISelLowering.h')
-rw-r--r-- | lib/Target/Mips/MipsSEISelLowering.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsSEISelLowering.h b/lib/Target/Mips/MipsSEISelLowering.h index 016d4adbf7..909ab7dfde 100644 --- a/lib/Target/Mips/MipsSEISelLowering.h +++ b/lib/Target/Mips/MipsSEISelLowering.h @@ -22,7 +22,11 @@ namespace llvm { public: explicit MipsSETargetLowering(MipsTargetMachine &TM); + /// \brief Enable MSA support for the given integer type and Register + /// class. void addMSAIntType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC); + /// \brief Enable MSA support for the given floating-point type and + /// Register class. void addMSAFloatType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC); @@ -69,6 +73,7 @@ namespace llvm { SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const; SDValue lowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const; SDValue lowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const; + SDValue lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const; MachineBasicBlock *emitBPOSGE32(MachineInstr *MI, MachineBasicBlock *BB) const; |