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authorAkira Hatanaka <ahatanaka@mips.com>2012-03-01 01:53:15 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-03-01 01:53:15 +0000
commite9e520f23ec3e5dc26e0801ac0d8b9e6899e2626 (patch)
tree978c0229c8eb3861906a73a42130920750d4c02d /lib/Target/Mips
parent66c994c2dbd1a76418fdd0acb138aa029538ffe5 (diff)
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Pass endian information to constructors. Define separate functions to create
objects for big endian and little endian targets. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151788 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r--lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp44
-rw-r--r--lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp5
-rw-r--r--lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp19
-rw-r--r--lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp27
-rw-r--r--lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h17
5 files changed, 55 insertions, 57 deletions
diff --git a/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index ca60225f10..d69570bdf0 100644
--- a/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -70,10 +70,16 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
namespace {
class MipsAsmBackend : public MCAsmBackend {
+ Triple::OSType OSType;
+ bool IsLittle; // Big or little endian
+
public:
- uint8_t OSABI;
- MipsAsmBackend(const Target &T, uint8_t OSABI_) :
- MCAsmBackend(), OSABI(OSABI_) {}
+ MipsAsmBackend(const Target &T, Triple::OSType _OSType, bool _isLittle) :
+ MCAsmBackend(), OSType(_OSType), IsLittle(_isLittle) {}
+
+ MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
+ return createMipsELFObjectWriter(OS, OSType, IsLittle);
+ }
/// ApplyFixup - Apply the \arg Value for given \arg Fixup into the provided
/// data fragment, at the offset specified by the fixup and following the
@@ -191,33 +197,15 @@ public:
}
};
-class MipsEB_AsmBackend : public MipsAsmBackend {
-public:
- MipsEB_AsmBackend(const Target &T, uint8_t _OSABI)
- : MipsAsmBackend(T, _OSABI) {}
-
- MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
- return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ false, OSABI);
- }
-};
-
-class MipsEL_AsmBackend : public MipsAsmBackend {
-public:
- MipsEL_AsmBackend(const Target &T, uint8_t _OSABI)
- : MipsAsmBackend(T, _OSABI) {}
-
- MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
- return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ true, OSABI);
- }
-};
} // namespace
-MCAsmBackend *llvm::createMipsBEAsmBackend(const Target &T, StringRef TT) {
- uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
- return new MipsEB_AsmBackend(T, OSABI);
+// MCAsmBackend
+MCAsmBackend *llvm::createMipsAsmBackendEL(const Target &T, StringRef TT) {
+ return new MipsAsmBackend(T, Triple(TT).getOS(),
+ /*IsLittle*/true);
}
-MCAsmBackend *llvm::createMipsLEAsmBackend(const Target &T, StringRef TT) {
- uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
- return new MipsEL_AsmBackend(T, OSABI);
+MCAsmBackend *llvm::createMipsAsmBackendEB(const Target &T, StringRef TT) {
+ return new MipsAsmBackend(T, Triple(TT).getOS(),
+ /*IsLittle*/false);
}
diff --git a/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp b/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
index 075d180a1e..076a6a8d8d 100644
--- a/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
+++ b/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
@@ -129,9 +129,8 @@ unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
return Type;
}
-MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS,
- bool IsLittleEndian,
- uint8_t OSABI) {
+MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
+ bool IsLittleEndian) {
MCELFObjectTargetWriter *MOTW = new MipsELFObjectWriter(OSABI);
return createELFObjectWriter(MOTW, OS, IsLittleEndian);
}
diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
index 4918230124..b039678175 100644
--- a/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
+++ b/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
@@ -34,10 +34,12 @@ class MipsMCCodeEmitter : public MCCodeEmitter {
const MCInstrInfo &MCII;
const MCSubtargetInfo &STI;
MCContext &Ctx;
+ bool IsLittleEndian;
public:
MipsMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti,
- MCContext &ctx) : MCII(mcii), STI(sti) , Ctx(ctx) {}
+ MCContext &ctx, bool IsLittle) :
+ MCII(mcii), STI(sti) , Ctx(ctx), IsLittleEndian(IsLittle) {}
~MipsMCCodeEmitter() {}
@@ -88,11 +90,18 @@ public:
}; // class MipsMCCodeEmitter
} // namespace
-MCCodeEmitter *llvm::createMipsMCCodeEmitter(const MCInstrInfo &MCII,
- const MCSubtargetInfo &STI,
- MCContext &Ctx)
+MCCodeEmitter *llvm::createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
+ const MCSubtargetInfo &STI,
+ MCContext &Ctx)
{
- return new MipsMCCodeEmitter(MCII, STI, Ctx);
+ return new MipsMCCodeEmitter(MCII, STI, Ctx, false);
+}
+
+MCCodeEmitter *llvm::createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
+ const MCSubtargetInfo &STI,
+ MCContext &Ctx)
+{
+ return new MipsMCCodeEmitter(MCII, STI, Ctx, true);
}
/// EncodeInstruction - Emit the instruction.
diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
index daa2f5c428..0a2dadd69e 100644
--- a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
+++ b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
@@ -112,7 +112,8 @@ extern "C" void LLVMInitializeMipsTargetMC() {
TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo);
- TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget, createMipsMCInstrInfo);
+ TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget,
+ createMipsMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
@@ -122,33 +123,31 @@ extern "C" void LLVMInitializeMipsTargetMC() {
createMipsMCRegisterInfo);
// Register the MC Code Emitter
- TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget, createMipsMCCodeEmitter);
+ TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget,
+ createMipsMCCodeEmitterEB);
TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
- createMipsMCCodeEmitter);
+ createMipsMCCodeEmitterEL);
TargetRegistry::RegisterMCCodeEmitter(TheMips64Target,
- createMipsMCCodeEmitter);
+ createMipsMCCodeEmitterEB);
TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget,
- createMipsMCCodeEmitter);
+ createMipsMCCodeEmitterEL);
// Register the object streamer.
TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer);
TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer);
TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer);
- TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget, createMCStreamer);
+ TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget,
+ createMCStreamer);
// Register the asm backend.
TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
- createMipsBEAsmBackend);
+ createMipsAsmBackendEB);
TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
- createMipsLEAsmBackend);
+ createMipsAsmBackendEL);
TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
- createMipsBEAsmBackend);
+ createMipsAsmBackendEB);
TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
- createMipsLEAsmBackend);
-
- TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget, createMipsMCCodeEmitter);
- TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
- createMipsMCCodeEmitter);
+ createMipsAsmBackendEL);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
index 63cb24052d..2e58f9d1cf 100644
--- a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
+++ b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
@@ -32,16 +32,19 @@ extern Target TheMipselTarget;
extern Target TheMips64Target;
extern Target TheMips64elTarget;
-MCCodeEmitter *createMipsMCCodeEmitter(const MCInstrInfo &MCII,
- const MCSubtargetInfo &STI,
- MCContext &Ctx);
+MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
+ const MCSubtargetInfo &STI,
+ MCContext &Ctx);
+MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
+ const MCSubtargetInfo &STI,
+ MCContext &Ctx);
-MCAsmBackend *createMipsBEAsmBackend(const Target &T, StringRef TT);
-MCAsmBackend *createMipsLEAsmBackend(const Target &T, StringRef TT);
+MCAsmBackend *createMipsAsmBackendEB(const Target &T, StringRef TT);
+MCAsmBackend *createMipsAsmBackendEL(const Target &T, StringRef TT);
MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
- bool IsLittleEndian,
- uint8_t OSABI);
+ uint8_t OSABI,
+ bool IsLittleEndian);
} // End llvm namespace
// Defines symbolic names for Mips registers. This defines a mapping from