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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-10-15 01:06:30 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-10-15 01:06:30 +0000 |
| commit | 89fee2ff928254f21cc9be358e1d8d4498fa0aee (patch) | |
| tree | 1acebba76135fb5f9ee336e662e18f5ce34ede0c /lib/Target/Mips | |
| parent | b00491341778776a4d994846ca2f7fafe79c161d (diff) | |
| download | llvm-89fee2ff928254f21cc9be358e1d8d4498fa0aee.tar.gz llvm-89fee2ff928254f21cc9be358e1d8d4498fa0aee.tar.bz2 llvm-89fee2ff928254f21cc9be358e1d8d4498fa0aee.tar.xz | |
[mips] Transfer kill flag to the newly created operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192662 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index f69a2d48b2..8c0991eed8 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -768,13 +768,17 @@ static MachineBasicBlock *expandPseudoDIV(MachineInstr *MI, // Insert instruction "teq $divisor_reg, $zero, 7". MachineBasicBlock::iterator I(MI); MachineInstrBuilder MIB; + MachineOperand &Divisor = MI->getOperand(2); MIB = BuildMI(MBB, llvm::next(I), MI->getDebugLoc(), TII.get(Mips::TEQ)) - .addOperand(MI->getOperand(2)).addReg(Mips::ZERO).addImm(7); + .addReg(Divisor.getReg(), getKillRegState(Divisor.isKill())) + .addReg(Mips::ZERO).addImm(7); // Use the 32-bit sub-register if this is a 64-bit division. if (Is64Bit) MIB->getOperand(0).setSubReg(Mips::sub_32); + // Clear Divisor's kill flag. + Divisor.setIsKill(false); return &MBB; } |