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authorJustin Holewinski <jholewinski@nvidia.com>2014-06-27 18:36:06 +0000
committerJustin Holewinski <jholewinski@nvidia.com>2014-06-27 18:36:06 +0000
commitc95d327874fbd06df3cfe71dc3d0eb6c205681a8 (patch)
tree9873ad02c88b261a1ff0b6df0e4e49c0df23702f /lib/Target/NVPTX/NVPTXISelLowering.cpp
parent9272c2b67e947903dce5e42298f81dd0442cd7d7 (diff)
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[NVPTX] Add 'b' asm constraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211946 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/NVPTX/NVPTXISelLowering.cpp')
-rw-r--r--lib/Target/NVPTX/NVPTXISelLowering.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/NVPTX/NVPTXISelLowering.cpp b/lib/Target/NVPTX/NVPTXISelLowering.cpp
index 9624c3f9fe..9160015009 100644
--- a/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -2605,6 +2605,7 @@ NVPTXTargetLowering::getConstraintType(const std::string &Constraint) const {
switch (Constraint[0]) {
default:
break;
+ case 'b':
case 'r':
case 'h':
case 'c':
@@ -2624,6 +2625,8 @@ NVPTXTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
MVT VT) const {
if (Constraint.size() == 1) {
switch (Constraint[0]) {
+ case 'b':
+ return std::make_pair(0U, &NVPTX::Int1RegsRegClass);
case 'c':
return std::make_pair(0U, &NVPTX::Int16RegsRegClass);
case 'h':