diff options
| author | Pawel Wodnicki <pawel@32bitmicro.com> | 2012-11-19 22:17:54 +0000 |
|---|---|---|
| committer | Pawel Wodnicki <pawel@32bitmicro.com> | 2012-11-19 22:17:54 +0000 |
| commit | 97b07299fad0d019224912afe63fa916c4a0c507 (patch) | |
| tree | 62ee88b7a34f55ee515bc1f551270be75d8a7370 /lib/Target/NVPTX/NVPTXISelLowering.h | |
| parent | 2439c573e6f9bc76d6bfd99bbac0b097f2c1a2d7 (diff) | |
| download | llvm-97b07299fad0d019224912afe63fa916c4a0c507.tar.gz llvm-97b07299fad0d019224912afe63fa916c4a0c507.tar.bz2 llvm-97b07299fad0d019224912afe63fa916c4a0c507.tar.xz | |
Merging r167855 into 3.2 relase branch
Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.
This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@168334 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/NVPTX/NVPTXISelLowering.h')
0 files changed, 0 insertions, 0 deletions