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author | Justin Holewinski <jholewinski@nvidia.com> | 2013-06-28 17:57:59 +0000 |
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committer | Justin Holewinski <jholewinski@nvidia.com> | 2013-06-28 17:57:59 +0000 |
commit | 1c07dae9fcd04469779edf7b86fef37fecc9466c (patch) | |
tree | 00693266d5e91559d69946347fd2fc111f3debab /lib/Target/NVPTX/NVPTXRegisterInfo.td | |
parent | bc48ce87ef608730616c3250b18c013b1b4a39fc (diff) | |
download | llvm-1c07dae9fcd04469779edf7b86fef37fecc9466c.tar.gz llvm-1c07dae9fcd04469779edf7b86fef37fecc9466c.tar.bz2 llvm-1c07dae9fcd04469779edf7b86fef37fecc9466c.tar.xz |
[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185174 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/NVPTX/NVPTXRegisterInfo.td')
-rw-r--r-- | lib/Target/NVPTX/NVPTXRegisterInfo.td | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/lib/Target/NVPTX/NVPTXRegisterInfo.td b/lib/Target/NVPTX/NVPTXRegisterInfo.td index 8d100d6316..bc705b8d5f 100644 --- a/lib/Target/NVPTX/NVPTXRegisterInfo.td +++ b/lib/Target/NVPTX/NVPTXRegisterInfo.td @@ -31,7 +31,6 @@ def VRDepot : NVPTXReg<"%Depot">; foreach i = 0-395 in { def P#i : NVPTXReg<"%p"#i>; // Predicate - def RC#i : NVPTXReg<"%rc"#i>; // 8-bit def RS#i : NVPTXReg<"%rs"#i>; // 16-bit def R#i : NVPTXReg<"%r"#i>; // 32-bit def RL#i : NVPTXReg<"%rl"#i>; // 64-bit @@ -49,7 +48,6 @@ foreach i = 0-395 in { // Register classes //===----------------------------------------------------------------------===// def Int1Regs : NVPTXRegClass<[i1], 8, (add (sequence "P%u", 0, 395))>; -def Int8Regs : NVPTXRegClass<[i8], 8, (add (sequence "RC%u", 0, 395))>; def Int16Regs : NVPTXRegClass<[i16], 16, (add (sequence "RS%u", 0, 395))>; def Int32Regs : NVPTXRegClass<[i32], 32, (add (sequence "R%u", 0, 395))>; def Int64Regs : NVPTXRegClass<[i64], 64, (add (sequence "RL%u", 0, 395))>; |