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authorChris Lattner <sabre@nondot.org>2010-11-14 21:39:51 +0000
committerChris Lattner <sabre@nondot.org>2010-11-14 21:39:51 +0000
commit2e35248f14ac449774de9727b460469fc3c93249 (patch)
treeae21fc29fe2b2592a345c141439dbd3eecdd0629 /lib/Target/PowerPC/InstPrinter
parent58d014f6031ab95b0057a54dc377e7b0d23d674f (diff)
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implement pretty printing support for the various pseudo
ops the asmprinter supported, fixing PowerPC/rlwimi2.ll among others. Down to 20 failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119080 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/InstPrinter')
-rw-r--r--lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp45
1 files changed, 45 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
index 7149de4c47..8a10c0fc5e 100644
--- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
+++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
@@ -36,6 +36,51 @@ StringRef PPCInstPrinter::getOpcodeName(unsigned Opcode) const {
void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
// TODO: pseudo ops.
+ // Check for slwi/srwi mnemonics.
+ if (MI->getOpcode() == PPC::RLWINM) {
+ unsigned char SH = MI->getOperand(2).getImm();
+ unsigned char MB = MI->getOperand(3).getImm();
+ unsigned char ME = MI->getOperand(4).getImm();
+ bool useSubstituteMnemonic = false;
+ if (SH <= 31 && MB == 0 && ME == (31-SH)) {
+ O << "\tslwi "; useSubstituteMnemonic = true;
+ }
+ if (SH <= 31 && MB == (32-SH) && ME == 31) {
+ O << "\tsrwi "; useSubstituteMnemonic = true;
+ SH = 32-SH;
+ }
+ if (useSubstituteMnemonic) {
+ printOperand(MI, 0, O);
+ O << ", ";
+ printOperand(MI, 1, O);
+ O << ", " << (unsigned int)SH;
+ return;
+ }
+ }
+
+ if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) &&
+ MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
+ O << "\tmr ";
+ printOperand(MI, 0, O);
+ O << ", ";
+ printOperand(MI, 1, O);
+ return;
+ }
+
+ if (MI->getOpcode() == PPC::RLDICR) {
+ unsigned char SH = MI->getOperand(2).getImm();
+ unsigned char ME = MI->getOperand(3).getImm();
+ // rldicr RA, RS, SH, 63-SH == sldi RA, RS, SH
+ if (63-SH == ME) {
+ O << "\tsldi ";
+ printOperand(MI, 0, O);
+ O << ", ";
+ printOperand(MI, 1, O);
+ O << ", " << (unsigned int)SH;
+ return;
+ }
+ }
+
printInstruction(MI, O);
}