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| author | Chris Lattner <sabre@nondot.org> | 2010-11-15 04:16:32 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-11-15 04:16:32 +0000 |
| commit | 5ffe38ef6ae3427b39b2d866ab8d1a73f9f69e56 (patch) | |
| tree | 3a07dc27f3ebb5e0ad923225ec2261d92d0bde5c /lib/Target/PowerPC/Makefile | |
| parent | 84a04adf3a766c1d40ba100b9b7235531122e468 (diff) | |
| download | llvm-5ffe38ef6ae3427b39b2d866ab8d1a73f9f69e56.tar.gz llvm-5ffe38ef6ae3427b39b2d866ab8d1a73f9f69e56.tar.bz2 llvm-5ffe38ef6ae3427b39b2d866ab8d1a73f9f69e56.tar.xz | |
Implement a basic MCCodeEmitter for PPC. This doesn't handle
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/Makefile')
| -rw-r--r-- | lib/Target/PowerPC/Makefile | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/Makefile b/lib/Target/PowerPC/Makefile index 484aa9849e..030defe212 100644 --- a/lib/Target/PowerPC/Makefile +++ b/lib/Target/PowerPC/Makefile @@ -16,7 +16,8 @@ BUILT_SOURCES = PPCGenInstrNames.inc PPCGenRegisterNames.inc \ PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \ PPCGenRegisterInfo.h.inc PPCGenRegisterInfo.inc \ PPCGenInstrInfo.inc PPCGenDAGISel.inc \ - PPCGenSubtarget.inc PPCGenCallingConv.inc + PPCGenSubtarget.inc PPCGenCallingConv.inc \ + PPCGenMCCodeEmitter.inc DIRS = InstPrinter TargetInfo |