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author | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 21:20:14 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 21:20:14 +0000 |
commit | b66e943d4cfa4a48ad028898d232754ecd3202c1 (patch) | |
tree | 3d7c8822c3375bab81c8f13084f1c12bdcb17373 /lib/Target/PowerPC/PPC.td | |
parent | 19aa2b5015205456b42c426ff2559e9b930e285c (diff) | |
download | llvm-b66e943d4cfa4a48ad028898d232754ecd3202c1.tar.gz llvm-b66e943d4cfa4a48ad028898d232754ecd3202c1.tar.bz2 llvm-b66e943d4cfa4a48ad028898d232754ecd3202c1.tar.xz |
Fix some 80-col. violations I introduced with the A2 PPC64 core.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153852 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPC.td')
-rw-r--r-- | lib/Target/PowerPC/PPC.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPC.td b/lib/Target/PowerPC/PPC.td index ca0aa331ca..c554d39434 100644 --- a/lib/Target/PowerPC/PPC.td +++ b/lib/Target/PowerPC/PPC.td @@ -90,7 +90,8 @@ def : Processor<"g5", G5Itineraries, Feature64Bit /*, Feature64BitRegs */]>; def : Processor<"a2", PPCA2Itineraries, [DirectiveA2, FeatureBookE, FeatureFSqrt, FeatureSTFIWX, - Feature64Bit /*, Feature64BitRegs */]>; + Feature64Bit + /*, Feature64BitRegs */]>; def : Processor<"ppc", G3Itineraries, [Directive32]>; def : Processor<"ppc64", G5Itineraries, [Directive64, FeatureAltivec, |