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author | Chris Lattner <sabre@nondot.org> | 2005-10-23 22:08:13 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-10-23 22:08:13 +0000 |
commit | c8d28890f6c8b769ad8160fa8a701de31f70cfad (patch) | |
tree | 9aad55ffccbd1cd3f726ab5cdb48bf89907678cf /lib/Target/PowerPC/PPC.td | |
parent | f690e6f3f694eb79351b3c518795e3e9031ca7ce (diff) | |
download | llvm-c8d28890f6c8b769ad8160fa8a701de31f70cfad.tar.gz llvm-c8d28890f6c8b769ad8160fa8a701de31f70cfad.tar.bz2 llvm-c8d28890f6c8b769ad8160fa8a701de31f70cfad.tar.xz |
rearrange things a bit so that instructions can use subtarget features in the
future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23902 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPC.td')
-rw-r--r-- | lib/Target/PowerPC/PPC.td | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/lib/Target/PowerPC/PPC.td b/lib/Target/PowerPC/PPC.td index 166a98fc13..da63511bf1 100644 --- a/lib/Target/PowerPC/PPC.td +++ b/lib/Target/PowerPC/PPC.td @@ -16,16 +16,6 @@ include "../Target.td" //===----------------------------------------------------------------------===// -// Register File Description -//===----------------------------------------------------------------------===// - -include "PPCRegisterInfo.td" -include "PPCSchedule.td" -include "PPCInstrInfo.td" - - - -//===----------------------------------------------------------------------===// // PowerPC Subtarget features. // @@ -41,7 +31,15 @@ def FeatureFSqrt : SubtargetFeature<"fsqrt", "Enable the fsqrt instruction">; //===----------------------------------------------------------------------===// -// PowerPC chips sets supported. +// Register File Description +//===----------------------------------------------------------------------===// + +include "PPCRegisterInfo.td" +include "PPCSchedule.td" +include "PPCInstrInfo.td" + +//===----------------------------------------------------------------------===// +// PowerPC processors supported. // def : Processor<"generic", G3Itineraries, []>; |