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| author | Owen Anderson <resistor@mac.com> | 2012-01-24 18:37:29 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2012-01-24 18:37:29 +0000 |
| commit | 4f8dc7b17accf4f2ec953b80b2cc79786207492e (patch) | |
| tree | 2edc4a99662a5d77bf89962cb3a1d76dbd1ade54 /lib/Target/PowerPC/PPCCodeEmitter.cpp | |
| parent | e983a134e7e40e214f590c3d8ba565bb85f39628 (diff) | |
| download | llvm-4f8dc7b17accf4f2ec953b80b2cc79786207492e.tar.gz llvm-4f8dc7b17accf4f2ec953b80b2cc79786207492e.tar.bz2 llvm-4f8dc7b17accf4f2ec953b80b2cc79786207492e.tar.xz | |
Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148833 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCCodeEmitter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp index 9d2f4d0e43..8f1f9a6d3c 100644 --- a/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -50,7 +50,7 @@ namespace { /// getBinaryCodeForInstr - This function, generated by the /// CodeEmitterGenerator using TableGen, produces the binary encoding for /// machine instructions. - unsigned getBinaryCodeForInstr(const MachineInstr &MI) const; + uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const; MachineRelocation GetRelocation(const MachineOperand &MO, |