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| author | Dale Johannesen <dalej@apple.com> | 2009-11-24 01:09:07 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2009-11-24 01:09:07 +0000 |
| commit | b60d5194f52349b74914593919764fe8f4396bdf (patch) | |
| tree | aef20e0122bd8c008e806281eea5ed102ddc36b7 /lib/Target/PowerPC/PPCISelDAGToDAG.cpp | |
| parent | 9d172d5ee779124a721a01f7db1ab3a41593e7b5 (diff) | |
| download | llvm-b60d5194f52349b74914593919764fe8f4396bdf.tar.gz llvm-b60d5194f52349b74914593919764fe8f4396bdf.tar.bz2 llvm-b60d5194f52349b74914593919764fe8f4396bdf.tar.xz | |
Make capitalization of names starting "is" more consistent.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89724 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelDAGToDAG.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 1cdd51e9fe..e7334b54d4 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -86,7 +86,7 @@ namespace { /// isRotateAndMask - Returns true if Mask and Shift can be folded into a /// rotate and mask opcode and mask operation. - static bool isRotateAndMask(SDNode *N, unsigned Mask, bool IsShiftMask, + static bool isRotateAndMask(SDNode *N, unsigned Mask, bool isShiftMask, unsigned &SH, unsigned &MB, unsigned &ME); /// getGlobalBaseReg - insert code into the entry mbb to materialize the PIC @@ -358,7 +358,7 @@ bool PPCDAGToDAGISel::isRunOfOnes(unsigned Val, unsigned &MB, unsigned &ME) { } bool PPCDAGToDAGISel::isRotateAndMask(SDNode *N, unsigned Mask, - bool IsShiftMask, unsigned &SH, + bool isShiftMask, unsigned &SH, unsigned &MB, unsigned &ME) { // Don't even go down this path for i64, since different logic will be // necessary for rldicl/rldicr/rldimi. @@ -374,12 +374,12 @@ bool PPCDAGToDAGISel::isRotateAndMask(SDNode *N, unsigned Mask, if (Opcode == ISD::SHL) { // apply shift left to mask if it comes first - if (IsShiftMask) Mask = Mask << Shift; + if (isShiftMask) Mask = Mask << Shift; // determine which bits are made indeterminant by shift Indeterminant = ~(0xFFFFFFFFu << Shift); } else if (Opcode == ISD::SRL) { // apply shift right to mask if it comes first - if (IsShiftMask) Mask = Mask >> Shift; + if (isShiftMask) Mask = Mask >> Shift; // determine which bits are made indeterminant by shift Indeterminant = ~(0xFFFFFFFFu >> Shift); // adjust for the left rotate |