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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-03-26 10:55:45 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-03-26 10:55:45 +0000 |
| commit | d67768db809d6b1cfe6f7c484b3719a6103286ea (patch) | |
| tree | 98319db788666275ab88d17c4b488f3de33ac9b5 /lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 2b0850b8305380244ec98e1b1c89aaf57adf3b09 (diff) | |
| download | llvm-d67768db809d6b1cfe6f7c484b3719a6103286ea.tar.gz llvm-d67768db809d6b1cfe6f7c484b3719a6103286ea.tar.bz2 llvm-d67768db809d6b1cfe6f7c484b3719a6103286ea.tar.xz | |
PowerPC: Remove LDrs pattern.
The LDrs pattern is a duplicate of LD, except that it accepts memory
addresses where the displacement is a symbolLo64. An operand type
"memrs" is defined for just that purpose.
However, this wouldn't be necessary if the default "memrix" operand
type were to simply accept 64-bit symbolic addresses directly.
The only problem with that is that it uses "symbolLo", which is
hardcoded to 32-bit.
To fix this, this commit changes "memri" and "memrix" to use new
operand types for the memory displacement, which allow iPTR
instead of i32. This will also make address parsing easier to
implment in the asm parser.
No change in generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178005 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
0 files changed, 0 insertions, 0 deletions