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| author | Hal Finkel <hfinkel@anl.gov> | 2013-08-19 05:01:02 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-08-19 05:01:02 +0000 |
| commit | 953a78084b85ea88cd2b208153a72df70e27133f (patch) | |
| tree | 0d675bc7cfc49f17f2da670f7fab40f064f6b84b /lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | a9b697975592b204e86496efc62a8b26fbfa1a03 (diff) | |
| download | llvm-953a78084b85ea88cd2b208153a72df70e27133f.tar.gz llvm-953a78084b85ea88cd2b208153a72df70e27133f.tar.bz2 llvm-953a78084b85ea88cd2b208153a72df70e27133f.tar.xz | |
Add the PPC fcpsgn instruction
Modern PPC cores support a floating-point copysign instruction, and we can use
this to lower the FCOPYSIGN node (which is created from calls to the libm
copysign function). A couple of extra patterns are necessary because the
operand types of FCOPYSIGN need not agree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188653 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 2b83a22ac6..bc55d383f1 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -149,8 +149,13 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) Subtarget->hasFRSQRTES() && Subtarget->hasFRES())) setOperationAction(ISD::FSQRT, MVT::f32, Expand); - setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); - setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); + if (Subtarget->hasFCPSGN()) { + setOperationAction(ISD::FCOPYSIGN, MVT::f64, Legal); + setOperationAction(ISD::FCOPYSIGN, MVT::f32, Legal); + } else { + setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); + setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); + } if (Subtarget->hasFPRND()) { setOperationAction(ISD::FFLOOR, MVT::f64, Legal); |