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| author | Hal Finkel <hfinkel@anl.gov> | 2013-09-11 23:05:25 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-09-11 23:05:25 +0000 |
| commit | b7fbc5baad87eb5cc143193e66139824993883d3 (patch) | |
| tree | 3c7ffbac65580880568aac5fa070adcba8aa3386 /lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 6c32111544d437128660e3fdb8701ae747f4a37b (diff) | |
| download | llvm-b7fbc5baad87eb5cc143193e66139824993883d3.tar.gz llvm-b7fbc5baad87eb5cc143193e66139824993883d3.tar.bz2 llvm-b7fbc5baad87eb5cc143193e66139824993883d3.tar.xz | |
Enable MI scheduling (and CodeGen AA) by default for embedded PPC cores
For embedded PPC cores (especially the A2 core), using the MI scheduler with AA
is far superior to the other scheduling options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190558 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 244e00d438..d3410749d1 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -556,7 +556,10 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setInsertFencesForAtomic(true); - setSchedulingPreference(Sched::Hybrid); + if (Subtarget->enableMachineScheduler()) + setSchedulingPreference(Sched::Source); + else + setSchedulingPreference(Sched::Hybrid); computeRegisterProperties(); @@ -7853,7 +7856,7 @@ bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(EVT VT) const { } Sched::Preference PPCTargetLowering::getSchedulingPreference(SDNode *N) const { - if (DisableILPPref) + if (DisableILPPref || PPCSubTarget.enableMachineScheduler()) return TargetLowering::getSchedulingPreference(N); return Sched::ILP; |