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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-27 05:57:58 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-27 05:57:58 +0000 |
| commit | ab42ec258627376e49f84141dd7be455b1e4ab3d (patch) | |
| tree | 76b56871e9aca967509e74c62a92f514f9126df8 /lib/Target/PowerPC/PPCInstr64Bit.td | |
| parent | 56d926ac14406ef87d34fbf77632c26d8e789818 (diff) | |
| download | llvm-ab42ec258627376e49f84141dd7be455b1e4ab3d.tar.gz llvm-ab42ec258627376e49f84141dd7be455b1e4ab3d.tar.bz2 llvm-ab42ec258627376e49f84141dd7be455b1e4ab3d.tar.xz | |
Apply the no-r0 register class to the PPC SELECT_CC_I[4|8] pseudos
Either operand of these pseudo instructions can be transformed into the first
operand of an isel instruction (and this operand cannot be r0).
This is not yet testable because we don't yet allocate r0 (and even when we do,
any test would be very fragile).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178119 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstr64Bit.td')
0 files changed, 0 insertions, 0 deletions