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| author | Dale Johannesen <dalej@apple.com> | 2007-08-09 00:49:19 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2007-08-09 00:49:19 +0000 |
| commit | 48bd15ed72bcf9464989516c078ed9d15030c95e (patch) | |
| tree | cf0c3837c247fadb03833004a5360a62c5da5f7d /lib/Target/PowerPC/PPCInstrAltivec.td | |
| parent | c1513d24eab4b193c951f3cad450ef344e88e0a6 (diff) | |
| download | llvm-48bd15ed72bcf9464989516c078ed9d15030c95e.tar.gz llvm-48bd15ed72bcf9464989516c078ed9d15030c95e.tar.bz2 llvm-48bd15ed72bcf9464989516c078ed9d15030c95e.tar.xz | |
Fix arguments for some Altivec instructions. From SWB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40957 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrAltivec.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrAltivec.td | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/lib/Target/PowerPC/PPCInstrAltivec.td b/lib/Target/PowerPC/PPCInstrAltivec.td index dc225843eb..5c88d9b2c7 100644 --- a/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/lib/Target/PowerPC/PPCInstrAltivec.td @@ -163,12 +163,18 @@ class VX2_Int<bits<11> xo, string opc, Intrinsic IntID> def IMPLICIT_DEF_VRRC : Pseudo<(outs VRRC:$rD), (ins),"; IMPLICIT_DEF_VRRC $rD", [(set VRRC:$rD, (v4i32 (undef)))]>; -def DSS : DSS_Form<822, (outs), (ins u5imm:$A, u5imm:$STRM,u5imm:$ZERO1,u5imm:$ZERO2), - "dss $STRM, $A", LdStGeneral /*FIXME*/, []>; -def DST : DSS_Form<342, (outs), (ins u5imm:$T, u5imm:$STRM, GPRC:$rA, GPRC:$rB), - "dst $rA, $rB, $STRM, $T", LdStGeneral /*FIXME*/, []>; -def DSTST : DSS_Form<374, (outs), (ins u5imm:$T, u5imm:$STRM, GPRC:$rA, GPRC:$rB), - "dstst $rA, $rB, $STRM, $T", LdStGeneral /*FIXME*/, []>; +def DSS : DSS_Form<822, (outs), (ins u5imm:$ZERO0, u5imm:$STRM,u5imm:$ZERO1,u5imm:$ZERO2), + "dss $STRM", LdStGeneral /*FIXME*/, []>; +def DSSALL: DSS_Form<822, (outs), (ins u5imm:$ONE, u5imm:$ZERO0,u5imm:$ZERO1,u5imm:$ZERO2), + "dssall", LdStGeneral /*FIXME*/, []>; +def DST : DSS_Form<342, (outs), (ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB), + "dst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>; +def DSTT : DSS_Form<342, (outs), (ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB), + "dstt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>; +def DSTST : DSS_Form<374, (outs), (ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB), + "dstst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>; +def DSTSTT: DSS_Form<374, (outs), (ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB), + "dststt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>; def MFVSCR : VXForm_4<1540, (outs VRRC:$vD), (ins), "mfvscr $vD", LdStGeneral, @@ -532,15 +538,15 @@ def V_SET0 : VXForm_setzero<1220, (outs VRRC:$vD), (ins), // DS* intrinsics. def : Pat<(int_ppc_altivec_dss imm:$STRM), (DSS 0, imm:$STRM, 0, 0)>; -def : Pat<(int_ppc_altivec_dssall), (DSS 1, 0, 0, 0)>; +def : Pat<(int_ppc_altivec_dssall), (DSSALL 1, 0, 0, 0)>; def : Pat<(int_ppc_altivec_dst GPRC:$rA, GPRC:$rB, imm:$STRM), (DST 0, imm:$STRM, GPRC:$rA, GPRC:$rB)>; def : Pat<(int_ppc_altivec_dstt GPRC:$rA, GPRC:$rB, imm:$STRM), - (DST 1, imm:$STRM, GPRC:$rA, GPRC:$rB)>; + (DSTT 1, imm:$STRM, GPRC:$rA, GPRC:$rB)>; def : Pat<(int_ppc_altivec_dstst GPRC:$rA, GPRC:$rB, imm:$STRM), (DSTST 0, imm:$STRM, GPRC:$rA, GPRC:$rB)>; def : Pat<(int_ppc_altivec_dststt GPRC:$rA, GPRC:$rB, imm:$STRM), - (DSTST 1, imm:$STRM, GPRC:$rA, GPRC:$rB)>; + (DSTSTT 1, imm:$STRM, GPRC:$rA, GPRC:$rB)>; // Undef. def : Pat<(v16i8 (undef)), (IMPLICIT_DEF_VRRC)>; |