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| author | Evan Cheng <evan.cheng@apple.com> | 2007-07-30 07:51:22 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-07-30 07:51:22 +0000 |
| commit | 66ffe6be0c7b50100a00cb0cc87a5d4983818572 (patch) | |
| tree | eefbe4143c3c5da409199e77c133704f20c60ec2 /lib/Target/PowerPC/PPCInstrAltivec.td | |
| parent | db9530599e0cdacbaea0b4a714742df0829cab5c (diff) | |
| download | llvm-66ffe6be0c7b50100a00cb0cc87a5d4983818572.tar.gz llvm-66ffe6be0c7b50100a00cb0cc87a5d4983818572.tar.bz2 llvm-66ffe6be0c7b50100a00cb0cc87a5d4983818572.tar.xz | |
Vector fneg must be expanded into fsub -0.0, X.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40586 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrAltivec.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrAltivec.td | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCInstrAltivec.td b/lib/Target/PowerPC/PPCInstrAltivec.td index 572be98825..7a404adee6 100644 --- a/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/lib/Target/PowerPC/PPCInstrAltivec.td @@ -70,7 +70,6 @@ def VMRGHW_unary_shuffle_mask : PatLeaf<(build_vector), [{ return PPC::isVMRGHShuffleMask(N, 4, true); }]>; - def VSLDOI_get_imm : SDNodeXForm<build_vector, [{ return getI32Imm(PPC::isVSLDOIShuffleMask(N, false)); }]>; @@ -133,6 +132,10 @@ def vecspltisw : PatLeaf<(build_vector), [{ return PPC::get_VSPLTI_elt(N, 4, *CurDAG).Val != 0; }], VSPLTISW_get_imm>; +def V_immneg0 : PatLeaf<(build_vector), [{ + return PPC::isAllNegativeZeroVector(N); +}]>; + //===----------------------------------------------------------------------===// // Helpers for defining instructions that directly correspond to intrinsics. @@ -228,7 +231,8 @@ def VMADDFP : VAForm_1<46, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vC, VRRC:$vB), Requires<[FPContractions]>; def VNMSUBFP: VAForm_1<47, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vC, VRRC:$vB), "vnmsubfp $vD, $vA, $vC, $vB", VecFP, - [(set VRRC:$vD, (fneg (fsub (fmul VRRC:$vA, VRRC:$vC), + [(set VRRC:$vD, (fsub V_immneg0, + (fsub (fmul VRRC:$vA, VRRC:$vC), VRRC:$vB)))]>, Requires<[FPContractions]>; |