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| author | Chris Lattner <sabre@nondot.org> | 2006-04-15 23:45:24 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-04-15 23:45:24 +0000 |
| commit | 6e94af75de7f21b667046063dde49181c233b973 (patch) | |
| tree | 60883e53432fa26251cc3b08aa9653093e8a73bf /lib/Target/PowerPC/PPCInstrAltivec.td | |
| parent | 1fcee4edf5ec242843be6dd726d9854cdfe6b276 (diff) | |
| download | llvm-6e94af75de7f21b667046063dde49181c233b973.tar.gz llvm-6e94af75de7f21b667046063dde49181c233b973.tar.bz2 llvm-6e94af75de7f21b667046063dde49181c233b973.tar.xz | |
Add patterns for matching vnots with bit converted inputs. Most of these will
go away when I start using evan's binop type canonicalizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27725 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrAltivec.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrAltivec.td | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrAltivec.td b/lib/Target/PowerPC/PPCInstrAltivec.td index 9fdf4ee125..971a715a88 100644 --- a/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/lib/Target/PowerPC/PPCInstrAltivec.td @@ -607,10 +607,16 @@ def : Pat<(v16i8 (vnot VRRC:$vA)), (v16i8 (VNOR VRRC:$vA, VRRC:$vA))>; def : Pat<(v8i16 (vnot VRRC:$vA)), (v8i16 (VNOR VRRC:$vA, VRRC:$vA))>; def : Pat<(v4i32 (vnot VRRC:$vA)), (v4i32 (VNOR VRRC:$vA, VRRC:$vA))>; +def : Pat<(v16i8 (vnot_conv VRRC:$vA)), (v16i8 (VNOR VRRC:$vA, VRRC:$vA))>; +def : Pat<(v8i16 (vnot_conv VRRC:$vA)), (v8i16 (VNOR VRRC:$vA, VRRC:$vA))>; +def : Pat<(v4i32 (vnot_conv VRRC:$vA)), (v4i32 (VNOR VRRC:$vA, VRRC:$vA))>; + + def : Pat<(v16i8 (and VRRC:$A, VRRC:$B)), (v16i8 (VAND VRRC:$A, VRRC:$B))>; def : Pat<(v8i16 (and VRRC:$A, VRRC:$B)), (v8i16 (VAND VRRC:$A, VRRC:$B))>; def : Pat<(v16i8 (or VRRC:$A, VRRC:$B)), (v16i8 (VOR VRRC:$A, VRRC:$B))>; def : Pat<(v8i16 (or VRRC:$A, VRRC:$B)), (v8i16 (VOR VRRC:$A, VRRC:$B))>; + def : Pat<(v16i8 (xor VRRC:$A, VRRC:$B)), (v16i8 (VXOR VRRC:$A, VRRC:$B))>; def : Pat<(v8i16 (xor VRRC:$A, VRRC:$B)), (v8i16 (VXOR VRRC:$A, VRRC:$B))>; def : Pat<(v16i8 (vnot (or VRRC:$A, VRRC:$B))),(v16i8 (VNOR VRRC:$A, VRRC:$B))>; @@ -620,6 +626,17 @@ def : Pat<(v16i8 (and VRRC:$A, (vnot VRRC:$B))), def : Pat<(v8i16 (and VRRC:$A, (vnot VRRC:$B))), (v8i16 (VANDC VRRC:$A, VRRC:$B))>; + +def : Pat<(v16i8 (vnot_conv (or VRRC:$A, VRRC:$B))),(v16i8 (VNOR VRRC:$A, VRRC:$B))>; +def : Pat<(v8i16 (vnot_conv (or VRRC:$A, VRRC:$B))),(v8i16 (VNOR VRRC:$A, VRRC:$B))>; +def : Pat<(v4i32 (vnot_conv (or VRRC:$A, VRRC:$B))),(v4i32 (VNOR VRRC:$A, VRRC:$B))>; +def : Pat<(v16i8 (and VRRC:$A, (vnot_conv VRRC:$B))), + (v16i8 (VANDC VRRC:$A, VRRC:$B))>; +def : Pat<(v8i16 (and VRRC:$A, (vnot_conv VRRC:$B))), + (v8i16 (VANDC VRRC:$A, VRRC:$B))>; +def : Pat<(v4i32 (and VRRC:$A, (vnot_conv VRRC:$B))), + (v4i32 (VANDC VRRC:$A, VRRC:$B))>; + def : Pat<(fmul VRRC:$vA, VRRC:$vB), (VMADDFP VRRC:$vA, VRRC:$vB, (v4i32 (V_SET0)))>; |