Write patterns for the various shl and srl patterns that don't involve

doing something clever.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23824 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 10 insertions, 4 deletions

diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td
index 880a66a99e..061311feaf 100644
--- a/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/lib/Target/PowerPC/PPCInstrFormats.td
@@ -468,13 +468,16 @@ class AForm_3<bits<6> opcode, bits<5> xo, dag OL, string asmstr, list<dag> pat>
 }
 
 // 1.7.13 M-Form
-class MForm_1<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> {
+class MForm_1<bits<6> opcode, dag OL, string asmstr, list<dag> pattern> 
+  : I<opcode, OL, asmstr> {
   bits<5> RA;
   bits<5> RS;
   bits<5> RB;
   bits<5> MB;
   bits<5> ME;
 
+  let Pattern = pattern;
+
   bit RC = 0;    // set by isDOT
 
   let Inst{6-10}  = RS;
@@ -485,18 +488,21 @@ class MForm_1<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> {
   let Inst{31}    = RC;
 }
 
-class MForm_2<bits<6> opcode, dag OL, string asmstr>
-  : MForm_1<opcode, OL, asmstr> {
+class MForm_2<bits<6> opcode, dag OL, string asmstr, list<dag> pattern>
+  : MForm_1<opcode, OL, asmstr, pattern> {
 }
 
 // 1.7.14 MD-Form
-class MDForm_1<bits<6> opcode, bits<3> xo, dag OL, string asmstr>
+class MDForm_1<bits<6> opcode, bits<3> xo, dag OL, string asmstr, 
+               list<dag> pattern>
          : I<opcode, OL, asmstr> {
   bits<5> RS;
   bits<5> RA;
   bits<6> SH;
   bits<6> MBE;
 
+  let Pattern = pattern;
+
   bit RC = 0;    // set by isDOT
 
   let Inst{6-10}  = RS;