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| author | Chris Lattner <sabre@nondot.org> | 2005-09-08 17:33:10 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-09-08 17:33:10 +0000 |
| commit | 3e63ead49b2166c7bc9e7b6bcc54e8ce3b4abe9d (patch) | |
| tree | 15b0ae26be96c3584437353d8393b8f67903df58 /lib/Target/PowerPC/PPCInstrFormats.td | |
| parent | d1cdc7028cbf5c58c3b3791d89c3bffa15944f65 (diff) | |
| download | llvm-3e63ead49b2166c7bc9e7b6bcc54e8ce3b4abe9d.tar.gz llvm-3e63ead49b2166c7bc9e7b6bcc54e8ce3b4abe9d.tar.bz2 llvm-3e63ead49b2166c7bc9e7b6bcc54e8ce3b4abe9d.tar.xz | |
add patterns to the addi/addis/mulli etc instructions. Define predicates
for matching signed 16-bit and shifted 16-bit ppc immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23267 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrFormats.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 1475f7ad03..0b71daf7bc 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -81,7 +81,9 @@ class BForm<bits<6> opcode, bit aa, bit lk, bits<5> bo, bits<2> bicode, dag OL, } // 1.7.4 D-Form -class DForm_base<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr>{ +class DForm_base<bits<6> opcode, dag OL, string asmstr, list<dag> pattern> + : I<opcode, OL, asmstr> { + let Pattern = pattern; bits<5> A; bits<5> B; bits<16> C; @@ -91,7 +93,8 @@ class DForm_base<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr>{ let Inst{16-31} = C; } -class DForm_1<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> { +class DForm_1<bits<6> opcode, dag OL, string asmstr> + : I<opcode, OL, asmstr> { bits<5> A; bits<16> C; bits<5> B; @@ -101,14 +104,16 @@ class DForm_1<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> { let Inst{16-31} = C; } -class DForm_2<bits<6> opcode, dag OL, string asmstr> - : DForm_base<opcode, OL, asmstr>; +class DForm_2<bits<6> opcode, dag OL, string asmstr, list<dag> pattern> + : DForm_base<opcode, OL, asmstr, pattern>; -class DForm_2_r0<bits<6> opcode, dag OL, string asmstr> +class DForm_2_r0<bits<6> opcode, dag OL, string asmstr, list<dag> pattern> : I<opcode, OL, asmstr> { bits<5> A; bits<16> B; + let Pattern = pattern; + let Inst{6-10} = A; let Inst{11-15} = 0; let Inst{16-31} = B; |