diff options
| author | Chris Lattner <sabre@nondot.org> | 2006-11-15 23:24:18 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-11-15 23:24:18 +0000 |
| commit | 8e28b5c4265ea636e5b737d9352096498be28d3b (patch) | |
| tree | 57b52d4fd97ef0df88e8089f3e41bbe3cc6ebd7e /lib/Target/PowerPC/PPCInstrFormats.td | |
| parent | f64f9a4b75d07819866bfcf918b922a76d3e1600 (diff) | |
| download | llvm-8e28b5c4265ea636e5b737d9352096498be28d3b.tar.gz llvm-8e28b5c4265ea636e5b737d9352096498be28d3b.tar.bz2 llvm-8e28b5c4265ea636e5b737d9352096498be28d3b.tar.xz | |
Stop using isTwoAddress, switching to operand constraints instead.
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31770 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrFormats.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index ab02558e0e..ce86d8f358 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -120,11 +120,6 @@ class DForm_2_r0<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin, let Inst{16-31} = B; } -// Currently we make the use/def reg distinction in ISel, not tablegen -class DForm_3<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin, - list<dag> pattern> - : DForm_1<opcode, OL, asmstr, itin, pattern>; - class DForm_4<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin, list<dag> pattern> : I<opcode, OL, asmstr, itin> { |