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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-04 14:24:00 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-04 14:24:00 +0000 |
| commit | 5606fcae50951e9d9aef7def18531b5fd017971b (patch) | |
| tree | 47f9e30d5228de00b7fc67441637285e4110358c /lib/Target/PowerPC/PPCInstrInfo.td | |
| parent | 32d15d90c41c79b0f343c928b1a2d4aa2d4142ef (diff) | |
| download | llvm-5606fcae50951e9d9aef7def18531b5fd017971b.tar.gz llvm-5606fcae50951e9d9aef7def18531b5fd017971b.tar.bz2 llvm-5606fcae50951e9d9aef7def18531b5fd017971b.tar.xz | |
[PowerPC] Add asm parser support for CR expressions
This adds support for specifying condition registers and
condition register fields via expressions using the symbols
defined by the PowerISA, like "4*cr2+eq".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185633 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 022c15179b..e104ea5ceb 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -392,7 +392,7 @@ def vrrc : RegisterOperand<VRRC> { let ParserMatchClass = PPCRegVRRCAsmOperand; } def PPCRegCRBITRCAsmOperand : AsmOperandClass { - let Name = "RegCRBITRC"; let PredicateMethod = "isRegNumber"; + let Name = "RegCRBITRC"; let PredicateMethod = "isCRBitNumber"; } def crbitrc : RegisterOperand<CRBITRC> { let ParserMatchClass = PPCRegCRBITRCAsmOperand; |