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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-21 19:03:21 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-21 19:03:21 +0000 |
| commit | 10f7f2a222d0e83dc0c33ad506a7686190c2f7a2 (patch) | |
| tree | 7a0756c7eacdb202839bfdf5c7a5b165ae758257 /lib/Target/PowerPC/PPCRegisterInfo.h | |
| parent | e9cc0a09ae38c87b1b26a44f5e32222ede4f84e6 (diff) | |
| download | llvm-10f7f2a222d0e83dc0c33ad506a7686190c2f7a2.tar.gz llvm-10f7f2a222d0e83dc0c33ad506a7686190c2f7a2.tar.bz2 llvm-10f7f2a222d0e83dc0c33ad506a7686190c2f7a2.tar.xz | |
Add support for spilling VRSAVE on PPC
Although there is only one Altivec VRSAVE register, it is a member of
a register class, and we need the ability to spill it. Because this
register is normally callee-preserved and handled by special code this
has never before been necessary. However, this capability will be required by
a forthcoming commit adding SjLj support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177654 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.h')
| -rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.h b/lib/Target/PowerPC/PPCRegisterInfo.h index 5f89f630ed..1c020ea5c9 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.h +++ b/lib/Target/PowerPC/PPCRegisterInfo.h @@ -66,6 +66,11 @@ public: int SPAdj, RegScavenger *RS) const; void lowerCRRestore(MachineBasicBlock::iterator II, unsigned FrameIndex, int SPAdj, RegScavenger *RS) const; + void lowerVRSAVESpilling(MachineBasicBlock::iterator II, unsigned FrameIndex, + int SPAdj, RegScavenger *RS) const; + void lowerVRSAVERestore(MachineBasicBlock::iterator II, unsigned FrameIndex, + int SPAdj, RegScavenger *RS) const; + bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg, int &FrameIdx) const; void eliminateFrameIndex(MachineBasicBlock::iterator II, |