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authorHal Finkel <hfinkel@anl.gov>2013-03-12 14:12:16 +0000
committerHal Finkel <hfinkel@anl.gov>2013-03-12 14:12:16 +0000
commit7285e8d98c9a44b7efe792462188cfe713dd9641 (patch)
tree1564f9891dba32336d3cd03f4fe7b3afd103b249 /lib/Target/PowerPC/PPCRegisterInfo.h
parentac5b3915aa64d287057752c2c90cfe04adacfa11 (diff)
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PPC should always use the register scavenger for CR spilling
This removes the -disable-ppc[32|64]-regscavenger options; the code that uses the register scavenger has been working well (and has been the default) for some time, and we don't need options to enable the old (broken) CR spilling code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176865 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.h')
-rw-r--r--lib/Target/PowerPC/PPCRegisterInfo.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.h b/lib/Target/PowerPC/PPCRegisterInfo.h
index 9840666242..83f755da9f 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.h
+++ b/lib/Target/PowerPC/PPCRegisterInfo.h
@@ -50,8 +50,9 @@ public:
virtual bool avoidWriteAfterWrite(const TargetRegisterClass *RC) const;
/// requiresRegisterScavenging - We require a register scavenger.
- /// FIXME (64-bit): Should be inlined.
- bool requiresRegisterScavenging(const MachineFunction &MF) const;
+ bool requiresRegisterScavenging(const MachineFunction &MF) const {
+ return true;
+ }
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const;