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author | Misha Brukman <brukman+llvm@gmail.com> | 2004-08-17 04:55:41 +0000 |
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committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-08-17 04:55:41 +0000 |
commit | f2ccb77ee9d8ab35866dae111fa36929689c7511 (patch) | |
tree | c1b71d510e6af6c32a71dd944bc85b6f468327b9 /lib/Target/PowerPC/PPCRegisterInfo.h | |
parent | 2c38413b3f5420f45f2f8220b21862246d446dd0 (diff) | |
download | llvm-f2ccb77ee9d8ab35866dae111fa36929689c7511.tar.gz llvm-f2ccb77ee9d8ab35866dae111fa36929689c7511.tar.bz2 llvm-f2ccb77ee9d8ab35866dae111fa36929689c7511.tar.xz |
PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15850 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.h')
-rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.h b/lib/Target/PowerPC/PPCRegisterInfo.h new file mode 100644 index 0000000000..e3750481d7 --- /dev/null +++ b/lib/Target/PowerPC/PPCRegisterInfo.h @@ -0,0 +1,56 @@ +//===- PPC32RegisterInfo.h - PowerPC32 Register Information Impl -*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the PowerPC implementation of the MRegisterInfo class. +// +//===----------------------------------------------------------------------===// + +#ifndef POWERPC32_REGISTERINFO_H +#define POWERPC32_REGISTERINFO_H + +#include "PowerPC.h" +#include "PPC32GenRegisterInfo.h.inc" +#include <map> + +namespace llvm { + +class Type; + +class PPC32RegisterInfo : public PPC32GenRegisterInfo { + std::map<unsigned, unsigned> ImmToIdxMap; +public: + PPC32RegisterInfo(); + const TargetRegisterClass* getRegClassForType(const Type* Ty) const; + + /// Code Generation virtual methods... + void storeRegToStackSlot(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + unsigned SrcReg, int FrameIndex) const; + + void loadRegFromStackSlot(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + unsigned DestReg, int FrameIndex) const; + + void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, + unsigned DestReg, unsigned SrcReg, + const TargetRegisterClass *RC) const; + + void eliminateCallFramePseudoInstr(MachineFunction &MF, + MachineBasicBlock &MBB, + MachineBasicBlock::iterator I) const; + + void eliminateFrameIndex(MachineBasicBlock::iterator II) const; + + void emitPrologue(MachineFunction &MF) const; + void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; +}; + +} // end namespace llvm + +#endif |