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| author | Jia Liu <proljc@gmail.com> | 2012-02-18 12:03:15 +0000 |
|---|---|---|
| committer | Jia Liu <proljc@gmail.com> | 2012-02-18 12:03:15 +0000 |
| commit | 31d157ae1ac2cd9c787dc3c1d28e64c682803844 (patch) | |
| tree | f26bc6f243960a904162b8ef10f0687800a41191 /lib/Target/PowerPC/PPCScheduleG4.td | |
| parent | 107506f814f42af4a905156e7ce5dd9a2ca6c0c7 (diff) | |
| download | llvm-31d157ae1ac2cd9c787dc3c1d28e64c682803844.tar.gz llvm-31d157ae1ac2cd9c787dc3c1d28e64c682803844.tar.bz2 llvm-31d157ae1ac2cd9c787dc3c1d28e64c682803844.tar.xz | |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCScheduleG4.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCScheduleG4.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCScheduleG4.td b/lib/Target/PowerPC/PPCScheduleG4.td index 03c3b29cc1..87a3151e7c 100644 --- a/lib/Target/PowerPC/PPCScheduleG4.td +++ b/lib/Target/PowerPC/PPCScheduleG4.td @@ -1,10 +1,10 @@ -//===- PPCScheduleG4.td - PPC G4 Scheduling Definitions ----*- tablegen -*-===// -// +//===-- PPCScheduleG4.td - PPC G4 Scheduling Definitions ---*- tablegen -*-===// +// // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines the itinerary class data for the G4 (7400) processor. |