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author | Chad Rosier <mcrosier@apple.com> | 2013-06-22 18:37:38 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2013-06-22 18:37:38 +0000 |
commit | 5b3fca50a08865f0db55fc92ad1c037a04e12177 (patch) | |
tree | 998e3b634ae4bbd2829c36ff98b0fa70e3cda198 /lib/Target/PowerPC | |
parent | 5729b8ea01739cf9b1171f0a4349275bc8124756 (diff) | |
download | llvm-5b3fca50a08865f0db55fc92ad1c037a04e12177.tar.gz llvm-5b3fca50a08865f0db55fc92ad1c037a04e12177.tar.bz2 llvm-5b3fca50a08865f0db55fc92ad1c037a04e12177.tar.xz |
The getRegForInlineAsmConstraint function should only accept MVT value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 2 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index a0856ec481..3378ace3e2 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -7514,7 +7514,7 @@ PPCTargetLowering::getSingleConstraintMatchWeight( std::pair<unsigned, const TargetRegisterClass*> PPCTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, - EVT VT) const { + MVT VT) const { if (Constraint.size() == 1) { // GCC RS6000 Constraint Letters switch (Constraint[0]) { diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index e85f96c38d..1c0ad1b8a3 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -420,7 +420,7 @@ namespace llvm { std::pair<unsigned, const TargetRegisterClass*> getRegForInlineAsmConstraint(const std::string &Constraint, - EVT VT) const; + MVT VT) const; /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate /// function arguments in the caller parameter area. This is the actual |