diff options
author | David Majnemer <david.majnemer@gmail.com> | 2013-09-26 05:22:11 +0000 |
---|---|---|
committer | David Majnemer <david.majnemer@gmail.com> | 2013-09-26 05:22:11 +0000 |
commit | dd5cebdd74aaaefcf50eb1ea44bee8b02ab65a2e (patch) | |
tree | f46b042909a4401cf45be4d93e8d9dd53a30b952 /lib/Target/PowerPC | |
parent | 11c2b15c0a8282cfdc1c74968ebaba92f1fdae34 (diff) | |
download | llvm-dd5cebdd74aaaefcf50eb1ea44bee8b02ab65a2e.tar.gz llvm-dd5cebdd74aaaefcf50eb1ea44bee8b02ab65a2e.tar.bz2 llvm-dd5cebdd74aaaefcf50eb1ea44bee8b02ab65a2e.tar.xz |
PPC: Do not introduce ISD nodes for fctid and fctiw
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191421 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.h | 8 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCInstr64Bit.td | 2 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 4 |
3 files changed, 6 insertions, 8 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index b98819901b..df3af35761 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -42,10 +42,10 @@ namespace llvm { /// unsigned integers and single-precision outputs. FCFIDU, FCFIDS, FCFIDUS, - /// FCTI[D,W]Z? - The FCTID, FCTIDZ, FCTIW and FCTIWZ instructions, - /// taking an f32 or f64 operand, producing an f64 value containing the - /// integer representation of that FP value. - FCTID, FCTIDZ, FCTIW, FCTIWZ, + /// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64 + /// operand, producing an f64 value containing the integer representation + /// of that FP value. + FCTIDZ, FCTIWZ, /// Newer FCTI[D,W]UZ floating-point-to-integer conversion instructions for /// unsigned integers. diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index 6025afbb1e..46aafbef3a 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -970,7 +970,7 @@ defm FCFID : XForm_26r<63, 846, (outs f8rc:$frD), (ins f8rc:$frB), [(set f64:$frD, (PPCfcfid f64:$frB))]>, isPPC64; defm FCTID : XForm_26r<63, 814, (outs f8rc:$frD), (ins f8rc:$frB), "fctid", "$frD, $frB", FPGeneral, - [(set f64:$frD, (PPCfctid f64:$frB))]>, isPPC64; + []>, isPPC64; defm FCTIDZ : XForm_26r<63, 815, (outs f8rc:$frD), (ins f8rc:$frB), "fctidz", "$frD, $frB", FPGeneral, [(set f64:$frD, (PPCfctidz f64:$frB))]>, isPPC64; diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 9baa791390..2bd3aadc79 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -69,9 +69,7 @@ def PPCfcfid : SDNode<"PPCISD::FCFID", SDTFPUnaryOp, []>; def PPCfcfidu : SDNode<"PPCISD::FCFIDU", SDTFPUnaryOp, []>; def PPCfcfids : SDNode<"PPCISD::FCFIDS", SDTFPRoundOp, []>; def PPCfcfidus: SDNode<"PPCISD::FCFIDUS", SDTFPRoundOp, []>; -def PPCfctid : SDNode<"PPCISD::FCTID", SDTFPUnaryOp, []>; def PPCfctidz : SDNode<"PPCISD::FCTIDZ", SDTFPUnaryOp, []>; -def PPCfctiw : SDNode<"PPCISD::FCTIW", SDTFPUnaryOp, []>; def PPCfctiwz : SDNode<"PPCISD::FCTIWZ", SDTFPUnaryOp, []>; def PPCfctiduz: SDNode<"PPCISD::FCTIDUZ",SDTFPUnaryOp, []>; def PPCfctiwuz: SDNode<"PPCISD::FCTIWUZ",SDTFPUnaryOp, []>; @@ -1696,7 +1694,7 @@ let Uses = [RM] in { let neverHasSideEffects = 1 in { defm FCTIW : XForm_26r<63, 14, (outs f8rc:$frD), (ins f8rc:$frB), "fctiw", "$frD, $frB", FPGeneral, - [(set f64:$frD, (PPCfctiw f64:$frB))]>; + []>; defm FCTIWZ : XForm_26r<63, 15, (outs f8rc:$frD), (ins f8rc:$frB), "fctiwz", "$frD, $frB", FPGeneral, [(set f64:$frD, (PPCfctiwz f64:$frB))]>; |