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authorTom Stellard <thomas.stellard@amd.com>2013-11-13 23:36:50 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-11-13 23:36:50 +0000
commita2b4eb6d15a13de257319ac6231b5ab622cd02b1 (patch)
tree3147a7994db9c80cbaa22526fae0dbfdc780c212 /lib/Target/R600/AMDGPURegisterInfo.h
parentb52bf6a3b31596a309f4b12884522e9b4a344654 (diff)
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R600/SI: Add support for private address space load/store
Private address space is emulated using the register file with MOVRELS and MOVRELD instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194626 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/AMDGPURegisterInfo.h')
-rw-r--r--lib/Target/R600/AMDGPURegisterInfo.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/R600/AMDGPURegisterInfo.h b/lib/Target/R600/AMDGPURegisterInfo.h
index 135d3dd020..688e1a02c1 100644
--- a/lib/Target/R600/AMDGPURegisterInfo.h
+++ b/lib/Target/R600/AMDGPURegisterInfo.h
@@ -50,6 +50,10 @@ struct AMDGPURegisterInfo : public AMDGPUGenRegisterInfo {
assert(!"Unimplemented"); return NULL;
}
+ virtual unsigned getHWRegIndex(unsigned Reg) const {
+ assert(!"Unimplemented"); return 0;
+ }
+
/// \returns the sub reg enum value for the given \p Channel
/// (e.g. getSubRegFromChannel(0) -> AMDGPU::sub0)
unsigned getSubRegFromChannel(unsigned Channel) const;