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author | Vincent Lejeune <vljn@ovi.com> | 2013-05-17 16:50:44 +0000 |
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committer | Vincent Lejeune <vljn@ovi.com> | 2013-05-17 16:50:44 +0000 |
commit | 21ca0b3ea45549f6f16c5b2d0e96ad49256baa1d (patch) | |
tree | 7c77ac33f2ba293a3e52c3bc6190495a34e84ccc /lib/Target/R600/R600MachineScheduler.h | |
parent | f63f85affa943d3257f91640b15d4e0d1e4a22d1 (diff) | |
download | llvm-21ca0b3ea45549f6f16c5b2d0e96ad49256baa1d.tar.gz llvm-21ca0b3ea45549f6f16c5b2d0e96ad49256baa1d.tar.bz2 llvm-21ca0b3ea45549f6f16c5b2d0e96ad49256baa1d.tar.xz |
R600: Use depth first scheduling algorithm
It should increase PV substitution opportunities and lower gpr
usage (pending computations path are "flushed" sooner)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182128 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/R600MachineScheduler.h')
-rw-r--r-- | lib/Target/R600/R600MachineScheduler.h | 32 |
1 files changed, 5 insertions, 27 deletions
diff --git a/lib/Target/R600/R600MachineScheduler.h b/lib/Target/R600/R600MachineScheduler.h index 3d0367fd8e..c82ee49c78 100644 --- a/lib/Target/R600/R600MachineScheduler.h +++ b/lib/Target/R600/R600MachineScheduler.h @@ -24,13 +24,6 @@ using namespace llvm; namespace llvm { -class CompareSUnit { -public: - bool operator()(const SUnit *S1, const SUnit *S2) { - return S1->getDepth() > S2->getDepth(); - } -}; - class R600SchedStrategy : public MachineSchedStrategy { const ScheduleDAGMI *DAG; @@ -38,12 +31,6 @@ class R600SchedStrategy : public MachineSchedStrategy { const R600RegisterInfo *TRI; MachineRegisterInfo *MRI; - enum InstQueue { - QAlu = 1, - QFetch = 2, - QOther = 4 - }; - enum InstKind { IDAlu, IDFetch, @@ -62,8 +49,9 @@ class R600SchedStrategy : public MachineSchedStrategy { AluLast }; - ReadyQueue *Available[IDLast], *Pending[IDLast]; - std::multiset<SUnit *, CompareSUnit> AvailableAlus[AluLast]; + std::vector<SUnit *> Available[IDLast], Pending[IDLast]; + std::vector<SUnit *> AvailableAlus[AluLast]; + std::vector<SUnit *> FakeCopy; InstKind CurInstKind; int CurEmitted; @@ -76,19 +64,9 @@ class R600SchedStrategy : public MachineSchedStrategy { public: R600SchedStrategy() : DAG(0), TII(0), TRI(0), MRI(0) { - Available[IDAlu] = new ReadyQueue(QAlu, "AAlu"); - Available[IDFetch] = new ReadyQueue(QFetch, "AFetch"); - Available[IDOther] = new ReadyQueue(QOther, "AOther"); - Pending[IDAlu] = new ReadyQueue(QAlu<<4, "PAlu"); - Pending[IDFetch] = new ReadyQueue(QFetch<<4, "PFetch"); - Pending[IDOther] = new ReadyQueue(QOther<<4, "POther"); } virtual ~R600SchedStrategy() { - for (unsigned I = 0; I < IDLast; ++I) { - delete Available[I]; - delete Pending[I]; - } } virtual void initialize(ScheduleDAGMI *dag); @@ -107,12 +85,12 @@ private: bool isAvailablesAluEmpty() const; SUnit *AttemptFillSlot (unsigned Slot); void PrepareNextSlot(); - SUnit *PopInst(std::multiset<SUnit *, CompareSUnit> &Q); + SUnit *PopInst(std::vector<SUnit*> &Q); void AssignSlot(MachineInstr *MI, unsigned Slot); SUnit* pickAlu(); SUnit* pickOther(int QID); - void MoveUnits(ReadyQueue *QSrc, ReadyQueue *QDst); + void MoveUnits(std::vector<SUnit *> &QSrc, std::vector<SUnit *> &QDst); }; } // namespace llvm |