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author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-06-04 18:33:25 +0000 |
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committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-06-04 18:33:25 +0000 |
commit | 1e06bcbd633175d75d13aaa5695ca0633ba86068 (patch) | |
tree | fb4121a5ec1d625b217caebab939ea6676026124 /lib/Target/Sparc/README.txt | |
parent | 5a57dbef33ec2d336de2a2e9da4e477a4969fe57 (diff) | |
download | llvm-1e06bcbd633175d75d13aaa5695ca0633ba86068.tar.gz llvm-1e06bcbd633175d75d13aaa5695ca0633ba86068.tar.bz2 llvm-1e06bcbd633175d75d13aaa5695ca0633ba86068.tar.xz |
Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183243 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/README.txt')
-rw-r--r-- | lib/Target/Sparc/README.txt | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/Sparc/README.txt b/lib/Target/Sparc/README.txt index c831367e43..34e68cfa78 100644 --- a/lib/Target/Sparc/README.txt +++ b/lib/Target/Sparc/README.txt @@ -38,7 +38,7 @@ t1: 1) should be replaced with a brz in V9 mode. -* Same as above, but emit conditional move on register zero (p192) in V9 +* Same as above, but emit conditional move on register zero (p192) in V9 mode. Testcase: int %t1(int %a, int %b) { @@ -47,12 +47,12 @@ int %t1(int %a, int %b) { ret int %D } -* Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling +* Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling with the Y register, if they are faster. * Codegen bswap(load)/store(bswap) -> load/store ASI -* Implement frame pointer elimination, e.g. eliminate save/restore for +* Implement frame pointer elimination, e.g. eliminate save/restore for leaf fns. * Fill delay slots |