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author | Brian Gaeke <gaeke@uiuc.edu> | 2004-02-25 19:28:19 +0000 |
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committer | Brian Gaeke <gaeke@uiuc.edu> | 2004-02-25 19:28:19 +0000 |
commit | e785e531f4495068ee46cabd926939eec15a565a (patch) | |
tree | 45cecabf95d92c9b76bc0f09eb2ce76a2573a973 /lib/Target/Sparc/Sparc.td | |
parent | 150666fd82f96a8615e63d3797e2d00f3edcb3e0 (diff) | |
download | llvm-e785e531f4495068ee46cabd926939eec15a565a.tar.gz llvm-e785e531f4495068ee46cabd926939eec15a565a.tar.bz2 llvm-e785e531f4495068ee46cabd926939eec15a565a.tar.xz |
SparcV8 skeleton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11828 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/Sparc.td')
-rw-r--r-- | lib/Target/Sparc/Sparc.td | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/lib/Target/Sparc/Sparc.td b/lib/Target/Sparc/Sparc.td new file mode 100644 index 0000000000..928689ca8b --- /dev/null +++ b/lib/Target/Sparc/Sparc.td @@ -0,0 +1,41 @@ +//===- SparcV8.td - Describe the SparcV8 Target Machine ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// +//===----------------------------------------------------------------------===// + +// Get the target-independent interfaces which we are implementing... +// +include "../Target.td" + +//===----------------------------------------------------------------------===// +// Register File Description +//===----------------------------------------------------------------------===// + +include "SparcV8Reg.td" +include "SparcV8Instrs.td" + +def SparcV8InstrInfo : InstrInfo { + let PHIInst = PHI; +} + +def SparcV8 : Target { + // Pointers are 32-bits in size. + let PointerType = i32; + + // According to the Mach-O Runtime ABI, these regs are nonvolatile across + // calls: + let CalleeSavedRegisters = [R1, R13, R14, R15, R16, R17, R18, R19, + R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, F14, F15, + F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, + F30, F31, CR2, CR3, CR4]; + + // Pull in Instruction Info: + let InstructionSet = SparcV8InstrInfo; +} |