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authorAnton Korobeynikov <asl@math.spbu.ru>2008-10-10 20:30:14 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2008-10-10 20:30:14 +0000
commitdf75bbae949ab834f3ee4697ea2c13d0ee9f28b2 (patch)
tree7e27b8ccc9cfb729f5a75a69a29ab7e73cb018e1 /lib/Target/Sparc/SparcCallingConv.td
parent4cf5e2eb6cbbe5e51b18921bd85056aaf4dc1c37 (diff)
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Extend set of return registers on sparc until someone will implement MRV support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57364 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcCallingConv.td')
-rw-r--r--lib/Target/Sparc/SparcCallingConv.td6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/Sparc/SparcCallingConv.td b/lib/Target/Sparc/SparcCallingConv.td
index dc0bf8e312..37b59b23d7 100644
--- a/lib/Target/Sparc/SparcCallingConv.td
+++ b/lib/Target/Sparc/SparcCallingConv.td
@@ -17,9 +17,9 @@
// Sparc 32-bit C return-value convention.
def RetCC_Sparc32 : CallingConv<[
- CCIfType<[i32], CCAssignToReg<[I0, I1]>>,
- CCIfType<[f32], CCAssignToReg<[F0]>>,
- CCIfType<[f64], CCAssignToReg<[D0]>>
+ CCIfType<[i32], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>,
+ CCIfType<[f32], CCAssignToReg<[F1, F3, F5, F7]>>,
+ CCIfType<[f64], CCAssignToReg<[D0, D2]>>
]>;
// Sparc 32-bit C Calling convention.