Avoid creating two TargetLowering objects for each target.

Instead, just create one, and make sure everything that needs
it can access it. Previously most of the SelectionDAGISel
subclasses all had their own TargetLowering object, which was
redundant with the TargetLowering object in the TargetMachine
subclasses, except on Sparc, where SparcTargetMachine
didn't have a TargetLowering object. Change Sparc to work
more like the other targets here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 3 insertions, 5 deletions

diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 4a3ca7fa06..d7aa08f8ca 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -29,14 +29,12 @@ using namespace llvm;
 ///
 namespace {
 class SparcDAGToDAGISel : public SelectionDAGISel {
-  SparcTargetLowering Lowering;
-
   /// Subtarget - Keep a pointer to the Sparc Subtarget around so that we can
   /// make the right decision when generating code for different targets.
   const SparcSubtarget &Subtarget;
 public:
-  explicit SparcDAGToDAGISel(TargetMachine &TM)
-    : SelectionDAGISel(Lowering), Lowering(TM),
+  explicit SparcDAGToDAGISel(SparcTargetMachine &TM)
+    : SelectionDAGISel(*TM.getTargetLowering()),
       Subtarget(TM.getSubtarget<SparcSubtarget>()) {
   }
 
@@ -189,6 +187,6 @@ SDNode *SparcDAGToDAGISel::Select(SDValue Op) {
 /// createSparcISelDag - This pass converts a legalized DAG into a 
 /// SPARC-specific DAG, ready for instruction scheduling.
 ///
-FunctionPass *llvm::createSparcISelDag(TargetMachine &TM) {
+FunctionPass *llvm::createSparcISelDag(SparcTargetMachine &TM) {
   return new SparcDAGToDAGISel(TM);
 }