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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-04-14 05:48:50 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-04-14 05:48:50 +0000 |
| commit | d9f88da7b329c54ccb0d2ebd3b3a4b0e4b1e2b06 (patch) | |
| tree | 200bdbe117d29cb45f322e55b1c762e1b47c6ec9 /lib/Target/Sparc/SparcInstrFormats.td | |
| parent | 1f098af3648f7714dd0501f8ba97601e99471806 (diff) | |
| download | llvm-d9f88da7b329c54ccb0d2ebd3b3a4b0e4b1e2b06.tar.gz llvm-d9f88da7b329c54ccb0d2ebd3b3a4b0e4b1e2b06.tar.bz2 llvm-d9f88da7b329c54ccb0d2ebd3b3a4b0e4b1e2b06.tar.xz | |
Use i32 for all SPARC shift amounts, even in 64-bit mode.
Test case by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179477 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcInstrFormats.td')
| -rw-r--r-- | lib/Target/Sparc/SparcInstrFormats.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Sparc/SparcInstrFormats.td b/lib/Target/Sparc/SparcInstrFormats.td index f101856915..e7fde085be 100644 --- a/lib/Target/Sparc/SparcInstrFormats.td +++ b/lib/Target/Sparc/SparcInstrFormats.td @@ -142,10 +142,10 @@ class F3_Si<bits<2> opVal, bits<6> op3val, bit xVal, dag outs, dag ins, // Define rr and ri shift instructions with patterns. multiclass F3_S<string OpcStr, bits<6> Op3Val, bit XVal, SDNode OpNode, ValueType VT, RegisterClass RC> { - def rr : F3_Sr<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs, RC:$rs2), + def rr : F3_Sr<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs, IntRegs:$rs2), !strconcat(OpcStr, " $rs, $rs2, $rd"), - [(set VT:$rd, (OpNode VT:$rs, VT:$rs2))]>; - def ri : F3_Si<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs, unknown:$shcnt), + [(set VT:$rd, (OpNode VT:$rs, i32:$rs2))]>; + def ri : F3_Si<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs, i32imm:$shcnt), !strconcat(OpcStr, " $rs, $shcnt, $rd"), - [(set VT:$rd, (OpNode VT:$rs, (VT imm:$shcnt)))]>; + [(set VT:$rd, (OpNode VT:$rs, (i32 imm:$shcnt)))]>; } |