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author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-06-08 15:32:59 +0000 |
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committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2013-06-08 15:32:59 +0000 |
commit | 1799921672835c49f6a29fc27d1840b7c36beabd (patch) | |
tree | 2120cae2da53bb9838ffd131b153085b96800183 /lib/Target/Sparc/SparcInstrInfo.cpp | |
parent | 9eefea009fb559cf441254f7022a2824386852c6 (diff) | |
download | llvm-1799921672835c49f6a29fc27d1840b7c36beabd.tar.gz llvm-1799921672835c49f6a29fc27d1840b7c36beabd.tar.bz2 llvm-1799921672835c49f6a29fc27d1840b7c36beabd.tar.xz |
[Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183613 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcInstrInfo.cpp')
-rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.cpp | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp index 2ccbdf85bd..626bc40adb 100644 --- a/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/lib/Target/Sparc/SparcInstrInfo.cpp @@ -289,10 +289,28 @@ void SparcInstrInfo::copyPhysReg(MachineBasicBlock &MBB, else if (SP::FPRegsRegClass.contains(DestReg, SrcReg)) BuildMI(MBB, I, DL, get(SP::FMOVS), DestReg) .addReg(SrcReg, getKillRegState(KillSrc)); - else if (SP::DFPRegsRegClass.contains(DestReg, SrcReg)) - BuildMI(MBB, I, DL, get(Subtarget.isV9() ? SP::FMOVD : SP::FpMOVD), DestReg) - .addReg(SrcReg, getKillRegState(KillSrc)); - else + else if (SP::DFPRegsRegClass.contains(DestReg, SrcReg)) { + if (Subtarget.isV9()) { + BuildMI(MBB, I, DL, get(SP::FMOVD), DestReg) + .addReg(SrcReg, getKillRegState(KillSrc)); + } else { + // Use two FMOVS instructions. + const TargetRegisterInfo *TRI = &getRegisterInfo(); + MachineInstr *MovMI = 0; + unsigned subRegIdx[] = {SP::sub_even, SP::sub_odd}; + for (unsigned i = 0; i != 2; ++i) { + unsigned Dst = TRI->getSubReg(DestReg, subRegIdx[i]); + unsigned Src = TRI->getSubReg(SrcReg, subRegIdx[i]); + assert(Dst && Src && "Bad sub-register"); + + MovMI = BuildMI(MBB, I, DL, get(SP::FMOVS), Dst).addReg(Src); + } + // Add implicit super-register defs and kills to the last MovMI. + MovMI->addRegisterDefined(DestReg, TRI); + if (KillSrc) + MovMI->addRegisterKilled(SrcReg, TRI); + } + } else llvm_unreachable("Impossible reg-to-reg copy"); } |