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| author | Torok Edwin <edwintorok@gmail.com> | 2009-07-11 20:10:48 +0000 |
|---|---|---|
| committer | Torok Edwin <edwintorok@gmail.com> | 2009-07-11 20:10:48 +0000 |
| commit | c25e7581b9b8088910da31702d4ca21c4734c6d7 (patch) | |
| tree | e4bb95c96a33fda5d5204f2c9d1b906084760415 /lib/Target/Sparc/SparcInstrInfo.cpp | |
| parent | d51ffcf303070b0a5aea7f365b85f6f969c384cb (diff) | |
| download | llvm-c25e7581b9b8088910da31702d4ca21c4734c6d7.tar.gz llvm-c25e7581b9b8088910da31702d4ca21c4734c6d7.tar.bz2 llvm-c25e7581b9b8088910da31702d4ca21c4734c6d7.tar.xz | |
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcInstrInfo.cpp')
| -rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp index 12c286af94..451c458ac0 100644 --- a/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/lib/Target/Sparc/SparcInstrInfo.cpp @@ -17,6 +17,7 @@ #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/Support/ErrorHandling.h" #include "SparcGenInstrInfo.inc" using namespace llvm; @@ -160,7 +161,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, BuildMI(MBB, I, DL, get(SP::STDFri)).addFrameIndex(FI).addImm(0) .addReg(SrcReg, getKillRegState(isKill)); else - assert(0 && "Can't store this register to stack slot"); + LLVM_UNREACHABLE("Can't store this register to stack slot"); } void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, @@ -177,7 +178,7 @@ void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, else if (RC == SP::DFPRegsRegisterClass) Opc = SP::STDFri; else - assert(0 && "Can't load this register"); + LLVM_UNREACHABLE("Can't load this register"); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)); for (unsigned i = 0, e = Addr.size(); i != e; ++i) MIB.addOperand(Addr[i]); @@ -200,7 +201,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, else if (RC == SP::DFPRegsRegisterClass) BuildMI(MBB, I, DL, get(SP::LDDFri), DestReg).addFrameIndex(FI).addImm(0); else - assert(0 && "Can't load this register from stack slot"); + LLVM_UNREACHABLE("Can't load this register from stack slot"); } void SparcInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, @@ -215,7 +216,7 @@ void SparcInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, else if (RC == SP::DFPRegsRegisterClass) Opc = SP::LDDFri; else - assert(0 && "Can't load this register"); + LLVM_UNREACHABLE("Can't load this register"); DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg); for (unsigned i = 0, e = Addr.size(); i != e; ++i) |