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| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-05-31 23:45:26 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-05-31 23:45:26 +0000 |
| commit | 23ed37a6b76e79272194fb46597f7280661b828f (patch) | |
| tree | a2c447458a013a1f1bcbdc84d43fe3c55c416a0d /lib/Target/Sparc/SparcRegisterInfo.td | |
| parent | cd8e3c4dcf4383b8b1c16827c6326f6e9bc49d51 (diff) | |
| download | llvm-23ed37a6b76e79272194fb46597f7280661b828f.tar.gz llvm-23ed37a6b76e79272194fb46597f7280661b828f.tar.bz2 llvm-23ed37a6b76e79272194fb46597f7280661b828f.tar.xz | |
Make SubRegIndex size mandatory, following r183020.
This also makes TableGen able to compute sizes/offsets of synthesized
indices representing tuples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcRegisterInfo.td')
| -rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.td b/lib/Target/Sparc/SparcRegisterInfo.td index d1edcb6de1..b57fd3ddaf 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.td +++ b/lib/Target/Sparc/SparcRegisterInfo.td @@ -21,8 +21,8 @@ class SparcCtrlReg<string n>: Register<n> { } let Namespace = "SP" in { -def sub_even : SubRegIndex; -def sub_odd : SubRegIndex; +def sub_even : SubRegIndex<32>; +def sub_odd : SubRegIndex<32, 32>; } // Registers are identified with 5-bit ID numbers. |