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| author | Chris Lattner <sabre@nondot.org> | 2005-12-17 22:22:53 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-12-17 22:22:53 +0000 |
| commit | 37949f5c2b48c128e31361f638fdd44c966ee4d0 (patch) | |
| tree | 6e472e3a25d431a68be3f48d2349981664c507a4 /lib/Target/Sparc/SparcRegisterInfo.td | |
| parent | 9034b883a463b37dbc4766ff7243dac3a27d0b11 (diff) | |
| download | llvm-37949f5c2b48c128e31361f638fdd44c966ee4d0.tar.gz llvm-37949f5c2b48c128e31361f638fdd44c966ee4d0.tar.bz2 llvm-37949f5c2b48c128e31361f638fdd44c966ee4d0.tar.xz | |
Add patterns for multiply, simplify Y register handling stuff, add RDY instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24796 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcRegisterInfo.td')
| -rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.td | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.td b/lib/Target/Sparc/SparcRegisterInfo.td index 40eb185b71..52ddf59721 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.td +++ b/lib/Target/Sparc/SparcRegisterInfo.td @@ -30,11 +30,6 @@ class Rd<bits<5> num, string n, list<Register> aliases> : SparcReg<n> { let Num = num; let Aliases = aliases; } -// Rs - Special "ancillary state registers" registers, like the Y, ASR, PSR, -// WIM, TBR, etc registers -class Rs<bits<5> num, string n> : SparcReg<n> { - let Num = num; -} // Integer registers def G0 : Ri< 0, "G0">; def G1 : Ri< 1, "G1">; def G2 : Ri< 2, "G2">; @@ -76,8 +71,6 @@ def D10 : Rd<20, "F20", [F20, F21]>; def D11 : Rd<22, "F22", [F22, F23]>; def D12 : Rd<24, "F24", [F24, F25]>; def D13 : Rd<26, "F26", [F26, F27]>; def D14 : Rd<28, "F28", [F28, F29]>; def D15 : Rd<30, "F30", [F30, F31]>; -// The Y register. -def Y : Rs<0, "Y">; // Register classes. // |