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authorChris Lattner <sabre@nondot.org>2006-01-12 01:28:56 +0000
committerChris Lattner <sabre@nondot.org>2006-01-12 01:28:56 +0000
commitb3c77152c85c0ec67afcf77a096008706498d4f6 (patch)
tree3b9f18b9987fddf3339bc9cd501683101c12a4ec /lib/Target/Sparc/SparcTargetMachine.cpp
parentc3f8c2eaac64ec76e9325b81663fe31303698a18 (diff)
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invert the sense of this switch and its name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25234 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcTargetMachine.cpp')
-rw-r--r--lib/Target/Sparc/SparcTargetMachine.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index e0766d1a2a..fbe353fc05 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -28,9 +28,9 @@ namespace {
// Register the target.
RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
- cl::opt<bool> DisableV8DAGDAG("disable-v8-dag-isel", cl::Hidden,
- cl::desc("Disable DAG-to-DAG isel for V8"),
- cl::init(1));
+ cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
+ cl::desc("Enable DAG-to-DAG isel for V8"),
+ cl::init(0));
}
/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
@@ -86,7 +86,7 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
if (PrintMachineCode)
PM.add(new PrintFunctionPass());
- if (DisableV8DAGDAG) {
+ if (!EnableV8DAGDAG) {
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
PM.add(createLowerSelectPass());