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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 10:45:16 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 10:45:16 +0000
commiteb2f72f454048a1d179d1c75f5a953c7dfe43fc9 (patch)
treed14dcdb1d6e4a0ec75163fa605c1c0e4744c18f8 /lib/Target/SystemZ/Disassembler
parent745ca1eed7dc0a056b066f16aea750ce6fa8a530 (diff)
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[SystemZ] Add GRH32 for the high word of a GR64
The only thing this does on its own is make the definitions of RISB[HL]G a bit more precise. Those instructions are only used by the MC layer at the moment, so no behavioral change is intended. The class is needed by later patches though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191660 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/Disassembler')
-rw-r--r--lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
index 79469b6afe..fc7fbf98f5 100644
--- a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
+++ b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
@@ -66,6 +66,12 @@ static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs);
}
+static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+ uint64_t Address,
+ const void *Decoder) {
+ return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs);
+}
+
static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder) {